EP1AGX20CF484C6N Altera, EP1AGX20CF484C6N Datasheet - Page 119

• Manufacturer Part Number: EP1AGX20CF484C6N
• Description: IC ARRIA GX FPGA 20K 484FBGA
• Manufacturer: Altera
• Series: Arria GXr

Specifications of EP1AGX20CF484C6N

• Number Of Logic Elements/cells: 21580
• Number Of Labs/clbs: 1079
• Total Ram Bits: 1229184
• Number Of I /o: 230
• Voltage - Supply: 1.15 V ~ 1.25 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 484-FBGA
• Family Name: Arria™ GX
• Number Of Logic Blocks/elements: 21580
• # I/os (max): 230
• Process Technology: CMOS
• Operating Supply Voltage (typ): 1.2V
• Logic Cells: 21580
• Ram Bits: 1229184
• Operating Supply Voltage (min): 1.15V
• Operating Supply Voltage (max): 1.25V
• Operating Temp Range: 0C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 484
• Package Type: FC-FBGA
• No. Of Macrocells: 21580
• Family Type: Arria GX
• No. Of I/o's: 230
• Operating Frequency Max: 622.08MHz
• Operating Temperature Range: 0°C To +85°C
• Logic Case Style: BGA
• No. Of Pins: 484
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Compliant
• Other names: 544-2395

Chapter 3: Configuration and Testing
Configuration
Configuring Arria GX FPGAs with JRunner
Programming Serial Configuration Devices with SRunner
Configuring Arria GX FPGAs with the MicroBlaster Driver
PLL Reconfiguration
© December 2009 Altera Corporation
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The JRunner software driver configures Altera FPGAs, including Arria GX FPGAs,
through the ByteBlaster
programming input file supported is in Raw Binary File (.rbf) format. JRunner also
requires a Chain Description File (.cdf) generated by the Quartus II software. JRunner
is targeted for embedded JTAG configuration. The source code is developed for the
Windows NT operating system (OS), but can be customized to run on other platforms.
For more information about the JRunner software driver, refer to the
Software Driver: An Embedded Solution for PLD JTAG Configuration
on the
You can program a serial configuration device in-system by an external
microprocessor using SRunner
embedded serial configuration device programming that can be easily customized to
fit into different embedded systems. SRunner software driver reads a raw
programming data file (.rpd) and writes to serial configuration devices. The serial
configuration device programming time using SRunner software driver is comparable
to the programming time when using the Quartus II software.
For more information about SRunner, refer to the
Solution for Serial Configuration Device Programming
website.
For more information about programming serial configuration devices, refer to the
Serial Configuration Devices (EPCS1, EPCS4, EPCS64, and EPCS128) Data Sheet
Configuration Handbook.
The MicroBlaster
input file and is ideal for embedded FPP or PS configuration. The source code is
developed for the Windows NT operating system, although it can be customized to
run on other operating systems.
For more information about the MicroBlaster software driver, refer to the
the MicroBlaster Fast Passive Parallel Software Driver
Configuring the MicroBlaster Passive Serial Software
The phase-locked loops (PLLs) in the Arria GX device family support reconfiguration
of their multiply, divide, VCO-phase selection, and bandwidth selection settings
without reconfiguring the entire device. You can use either serial data from the logic
array or regular I/O pins to program the PLL’s counter settings in a serial chain. This
option provides considerable flexibility for frequency synthesis, allowing real-time
variation of the PLL frequency and delay. The rest of the device is functional while
reconfiguring the PLL.
Altera
website.
™
software driver supports a raw binary file (RBF) programming
™
II or ByteBlasterMV cables in JTAG mode. The
TM
. SRunner is a software driver developed for
AN418: SRunner: An Embedded
Driver.
White Paper or the
and the source code on the
Arria GX Device Handbook, Volume 1
and the source files
AN414: JRunner
AN423:
Configuring
in the
Altera
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