EP1AGX20CF484C6N Altera, EP1AGX20CF484C6N Datasheet - Page 146

• Manufacturer Part Number: EP1AGX20CF484C6N
• Description: IC ARRIA GX FPGA 20K 484FBGA
• Manufacturer: Altera
• Series: Arria GXr

Specifications of EP1AGX20CF484C6N

• Number Of Logic Elements/cells: 21580
• Number Of Labs/clbs: 1079
• Total Ram Bits: 1229184
• Number Of I /o: 230
• Voltage - Supply: 1.15 V ~ 1.25 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 484-FBGA
• Family Name: Arria™ GX
• Number Of Logic Blocks/elements: 21580
• # I/os (max): 230
• Process Technology: CMOS
• Operating Supply Voltage (typ): 1.2V
• Logic Cells: 21580
• Ram Bits: 1229184
• Operating Supply Voltage (min): 1.15V
• Operating Supply Voltage (max): 1.25V
• Operating Temp Range: 0C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 484
• Package Type: FC-FBGA
• No. Of Macrocells: 21580
• Family Type: Arria GX
• No. Of I/o's: 230
• Operating Frequency Max: 622.08MHz
• Operating Temperature Range: 0°C To +85°C
• Logic Case Style: BGA
• No. Of Pins: 484
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Compliant
• Other names: 544-2395

4–24
Bus Hold Specifications
Table 4–39. Bus Hold Parameters
On-Chip Termination Specifications
Table 4–40. Series On-Chip Termination Specification for Top and Bottom I/O Banks
Arria GX Device Handbook, Volume 1
Low
sustaining
current
High
sustaining
current
Low overdrive
current
High
overdrive
current
Bus-hold trip
point
25- R
50- R
25- R
50- R
50- R
50- R
Parameter
Symbol
S
S
S
S
S
S
3.3/2.5
3.3/2.5
1.8
1.8
1.5
1.2
(maximum)
(minimum)
Conditions
<V
V
V
V
Internal series termination without
calibration (25- setting
Internal series termination without
calibration (50- setting
Internal series termination without
calibration (25- setting
Internal series termination without
calibration (50- setting
Internal series termination without
calibration (50- setting
Internal series termination without
calibration (50- setting
IN
IN
IN
0 V <
IN
0 V
< V
—
< V
< V
Table 4–39
Table 4–40
tolerance when using series or differential on-chip termination.
> V
CCIO
CCIO
IL
IH
Description
–22.5
22.5
0.45
Min
—
—
shows the Arria GX device family bus hold specifications.
and
1.2 V
Table 4–41
–120
Max
0.95
120
—
—
Min
–25
0.5
25
—
—
1.5 V
define the specification for internal termination resistance
–160
Max
160
V
V
1.0
—
—
CCIO
CCIO
V
V
V
V
Conditions
CCIO
CCIO
CCIO
CCIO
= 3.3/2.5V
= 3.3/2.5V
= 1.8V
= 1.8V
= 1.5V
= 1.2V
0.68
Min
–30
V
30
—
—
C CIO
1.8 V
Level
–200
1.07
Max
200
—
—
Commercial
Max
±30
±30
±30
±30
±36
±50
Min
–50
0.7
Chapter 4: DC and Switching Characteristics
50
—
—
Resistance Tolerance
2.5 V
© December 2009 Altera Corporation
–300
Max
300
1.7
—
—
Industrial
± 30
Max
±30
±30
±30
±36
±50
Min
–70
0.8
70
—
—
3.3 V
Operating Conditions
–500
Max
500
Units
2.0
—
—
%
%
%
%
%
%
Units
A
A
A
A
V