EP1AGX20CF484C6N Altera, EP1AGX20CF484C6N Datasheet - Page 181

• Manufacturer Part Number: EP1AGX20CF484C6N
• Description: IC ARRIA GX FPGA 20K 484FBGA
• Manufacturer: Altera
• Series: Arria GXr

Specifications of EP1AGX20CF484C6N

• Number Of Logic Elements/cells: 21580
• Number Of Labs/clbs: 1079
• Total Ram Bits: 1229184
• Number Of I /o: 230
• Voltage - Supply: 1.15 V ~ 1.25 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 484-FBGA
• Family Name: Arria™ GX
• Number Of Logic Blocks/elements: 21580
• # I/os (max): 230
• Process Technology: CMOS
• Operating Supply Voltage (typ): 1.2V
• Logic Cells: 21580
• Ram Bits: 1229184
• Operating Supply Voltage (min): 1.15V
• Operating Supply Voltage (max): 1.25V
• Operating Temp Range: 0C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 484
• Package Type: FC-FBGA
• No. Of Macrocells: 21580
• Family Type: Arria GX
• No. Of I/o's: 230
• Operating Frequency Max: 622.08MHz
• Operating Temperature Range: 0°C To +85°C
• Logic Case Style: BGA
• No. Of Pins: 484
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Compliant
• Other names: 544-2395

Chapter 4: DC and Switching Characteristics
Typical Design Performance
Table 4–66. EP1AGX60 Row Pins Input Timing Parameters (Part 1 of 3)
© December 2009 Altera Corporation
3.3-V LVTTL
3.3-V LVCMOS
2.5 V
I/O Standard
Table 4–64
devices.
Table 4–64. EP1AGX50 Row Pin Delay Adders for Regional Clock
Table 4–65
devices.
Table 4–65. EP1AGX50 Column Pin Delay Adders for Regional Clock
EP1AGX60 I/O Timing Parameters
Table 4–66
EP1AGX60 devices for I/O standards which support general purpose I/O pins.
Table 4–66
RCLK input adder
RCLK PLL input adder
RCLK output adder
RCLK PLL output adder
RCLK input adder
RCLK PLL input adder
RCLK output adder
RCLK PLL output adder
Parameter
GCLK PLL
GCLK PLL
GCLK PLL
Parameter
Clock
GCLK
GCLK
GCLK
lists row pin delay adders when using the regional clock in Arria GX
lists column pin delay adders when using the regional clock in Arria GX
through
lists I/O timing specifications.
Table 4–69
Parameter
t
t
t
t
t
t
t
t
t
t
t
t
SU
SU
SU
SU
SU
SU
H
H
H
H
H
H
Industrial
–0.151
–0.011
Industrial
0.151
0.011
–1.713
–0.146
list the maximum I/O timing parameters for
0.146
1.716
Industrial
Fast Corner
–1.308
–2.870
–1.308
–2.870
–1.320
–2.882
1.413
2.975
1.413
2.975
1.425
2.987
Fast Corner
Fast Model
Commercial
Commercial
–0.151
–0.011
0.151
0.011
Commercial
–1.713
–0.146
0.146
1.716
–1.308
–2.870
–1.308
–2.870
–1.320
–2.882
1.413
2.975
1.413
2.975
1.425
2.987
Arria GX Device Handbook, Volume 1
–6 Speed Grade
–6 Speed Grade
–6 Speed
–2.836
–6.259
–2.836
–6.259
–2.817
–6.240
–0.329
–0.016
Grade
3.113
6.536
3.113
6.536
3.094
6.517
0.329
0.016
–3.645
–0.336
0.334
4.488
Units
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Units
ns
ns
ns
ns
ns
ns
ns
ns
4–59