EP1AGX20CF484C6N Altera, EP1AGX20CF484C6N Datasheet - Page 217

IC ARRIA GX FPGA 20K 484FBGA

EP1AGX20CF484C6N

Manufacturer Part Number
EP1AGX20CF484C6N
Description
IC ARRIA GX FPGA 20K 484FBGA
Manufacturer
Altera
Series
Arria GXr
Datasheet

Specifications of EP1AGX20CF484C6N

Number Of Logic Elements/cells
21580
Number Of Labs/clbs
1079
Total Ram Bits
1229184
Number Of I /o
230
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
484-FBGA
Family Name
Arria™ GX
Number Of Logic Blocks/elements
21580
# I/os (max)
230
Process Technology
CMOS
Operating Supply Voltage (typ)
1.2V
Logic Cells
21580
Ram Bits
1229184
Operating Supply Voltage (min)
1.15V
Operating Supply Voltage (max)
1.25V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
484
Package Type
FC-FBGA
No. Of Macrocells
21580
Family Type
Arria GX
No. Of I/o's
230
Operating Frequency Max
622.08MHz
Operating Temperature Range
0°C To +85°C
Logic Case Style
BGA
No. Of Pins
484
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Compliant
Other names
544-2395

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EP1AGX20CF484C6N
Manufacturer:
ALTERA
Quantity:
672
Part Number:
EP1AGX20CF484C6N
Manufacturer:
Altera
Quantity:
10 000
Part Number:
EP1AGX20CF484C6N
Manufacturer:
ALTERA
Quantity:
8 000
Part Number:
EP1AGX20CF484C6N
Manufacturer:
ALTERA
0
Part Number:
EP1AGX20CF484C6N
Manufacturer:
ALTERA
Quantity:
40
Chapter 4: DC and Switching Characteristics
Duty Cycle Distortion
Duty Cycle Distortion
© December 2009 Altera Corporation
Table 4–107. Arria GX Maximum Output Clock Rate for Dedicated Clock Pins (Part 4 of 4)
Duty cycle distortion (DCD) describes how much the falling edge of a clock is off from
its ideal position. The ideal position is when both the clock high time (CLKH) and the
clock low time (CLKL) equal half of the clock period (T), as shown in
DCD is the deviation of the non-ideal falling edge from the ideal falling edge, such as
D1 for the falling edge A and D2 for the falling edge B (refer to
maximum DCD for a clock is the larger value of D1 and D2.
1.5 V
SSTL-2 CLASS I
SSTL-2 CLASS II
SSTL-18 CLASS I
SSTL-18 CLASS II
1.8-V HSTL CLASS I
1.8-V HSTL CLASS II
1.5-V HSTL CLASS I
1.2-V HSTL
DIFFERENTIAL SSTL-2
DIFFERENTIAL 2.5-V
SSTL CLASS II
DIFFERENTIAL 1.8-V
SSTL CLASS I
DIFFERENTIAL 1.8-V
SSTL CLASS II
DIFFERENTIAL 1.8-V
HSTL CLASS I
DIFFERENTIAL 1.8-V
HSTL CLASS II
DIFFERENTIAL 1.5-V
HSTL CLASS I
DIFFERENTIAL 1.2-V
HSTL
I/O Standards
SERIES_50_OHMS
SERIES_50_OHMS
SERIES_25_OHMS
SERIES_50_OHMS
SERIES_25_OHMS
SERIES_50_OHMS
SERIES_50_OHMS
SERIES_50_OHMS
SERIES_25_OHMS
SERIES_50_OHMS
SERIES_25_OHMS
SERIES_50_OHMS
SERIES_25_OHMS
SERIES_50_OHMS
SERIES_50_OHMS
SERIES_50_OHMS
SERIES_25_OHMS
Drive Strength
–6 Speed Grade
373
467
467
327
420
561
420
467
233
467
467
327
420
561
420
467
233
Arria GX Device Handbook, Volume 1
Figure
Figure
4–10). The
Units
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
4–10.
4–95

Related parts for EP1AGX20CF484C6N