EP1AGX20CF484C6N Altera, EP1AGX20CF484C6N Datasheet - Page 133

• Manufacturer Part Number: EP1AGX20CF484C6N
• Description: IC ARRIA GX FPGA 20K 484FBGA
• Manufacturer: Altera
• Series: Arria GXr

Specifications of EP1AGX20CF484C6N

• Number Of Logic Elements/cells: 21580
• Number Of Labs/clbs: 1079
• Total Ram Bits: 1229184
• Number Of I /o: 230
• Voltage - Supply: 1.15 V ~ 1.25 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 484-FBGA
• Family Name: Arria™ GX
• Number Of Logic Blocks/elements: 21580
• # I/os (max): 230
• Process Technology: CMOS
• Operating Supply Voltage (typ): 1.2V
• Logic Cells: 21580
• Ram Bits: 1229184
• Operating Supply Voltage (min): 1.15V
• Operating Supply Voltage (max): 1.25V
• Operating Temp Range: 0C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 484
• Package Type: FC-FBGA
• No. Of Macrocells: 21580
• Family Type: Arria GX
• No. Of I/o's: 230
• Operating Frequency Max: 622.08MHz
• Operating Temperature Range: 0°C To +85°C
• Logic Case Style: BGA
• No. Of Pins: 484
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Compliant
• Other names: 544-2395

Chapter 4: DC and Switching Characteristics
Operating Conditions
Table 4–7. Arria GX Transceiver Block AC Specification
© December 2009 Altera Corporation
SDI Receiver Jitter Tolerance
Sinusoidal Jitter Tolerance
(peak-to-peak)
Sinusoidal Jitter Tolerance
(peak-to-peak)
Notes to
(1) Dedicated REFCLK pins were used to drive the input reference clocks.
(2) Jitter numbers specified are valid for the stated conditions only.
(3) Refer to the protocol characterization documents for detailed information.
(4) The jitter numbers for XAUI are compliant to the IEEE802.3ae-2002 Specification.
(5) The jitter numbers for PCI Express are compliant to the PCIe Base Specification 2.0.
(6) The jitter numbers for Serial RapidIO are compliant to the RapidIO Specification 1.3.
(7) The jitter numbers for GIGE are compliant to the IEEE802.3-2002 Specification.
(8) The HD-SDI and 3G-SDI jitter numbers are compliant to the SMPTE292M and SMPTE424M specifications.
Table
4–7:
Description
(8)
Jitter Frequency = 15 KHz
Data Rate = 2.97 Gbps (3G)
REFCLK
Pattern = Single Line
Scramble Color Bar
No Equalization
DC Gain = 0 dB
Jitter Frequency = 100 KHz
Data Rate = 2.97 Gbps (3G)
REFCLK
Pattern = Single Line Scramble Color Bar
No Equalization
DC Gain = 0 dB
Jitter Frequency = 148.5 MHz
Data Rate = 2.97 Gbps (3G)
REFCLK
Pattern = Single Line
Scramble Color Bar
No Equalization
DC Gain = 0 dB
Jitter Frequency = 20 KHz
Data Rate = 1.485 Gbps (HD)
REFCLK
Pattern = 75% Color Bar
No Equalization
DC Gain = 0 dB
Jitter Frequency = 100 KHz
Data Rate = 1.485 Gbps (HD)
REFCLK
Pattern = 75% Color Bar
No Equalization
DC Gain = 0 dB
= 148.5 MHz
= 148.5 MHz
= 74.25 MHz
= 74.25 MHz
= 148.5 MHz
(Note
1), (2),
Condition
(3)
(Part 4 of 4)
Arria GX Device Handbook, Volume 1
–6 Speed Grade
Commercial &
Industrial
> 0.3
> 0.3
> 0.2
> 2
> 1
Units
UI
UI
UI
UI
UI
4–11