MC68MH360ZP33L Freescale Semiconductor, MC68MH360ZP33L Datasheet - Page 12

• Manufacturer Part Number: MC68MH360ZP33L
• Description: IC MPU 32BIT QUICC 357-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68MH360ZP33L

• Processor Type: M683xx 32-Bit
• Speed: 33MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 357-PBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -

Table of Contents
Paragraph
Number
6.5
6.5.1
6.5.2
6.5.3
6.5.3.1
6.5.3.2
6.5.4
6.5.5
6.5.5.1
6.5.5.2
6.5.5.3
6.5.5.4
6.5.5.5
6.5.5.6
6.5.5.7
6.5.6
6.5.6.1
6.5.6.2
6.5.6.3
6.5.7
6.5.7.1
6.5.7.2
6.5.8
6.6
6.7
6.7.1
6.7.2
6.7.3
6.8
6.8.1
6.8.2
6.8.3
6.8.4
6.8.5
6.8.6
6.9
6.9.1
6.9.2
6.9.3
6.9.3.1
6.9.3.2
6.9.3.3
6.9.3.4
6.9.3.5
6.9.3.6
viii
SIM60 System Clock Generation...........................................................6-12
Clock Generation Methods ....................................................................6-12
Oscillator Prescaler (Divide by 128).......................................................6-13
Phase-Locked Loop (PLL) .....................................................................6-14
Frequency Multiplication ........................................................................6-14
Skew Elimination....................................................................................6-15
Low-Power Divider.................................................................................6-15
QUICC Internal Clock Signals................................................................6-15
SPCLK ...................................................................................................6-16
General System Clock ...........................................................................6-16
BRGCLK ................................................................................................6-17
SyncCLK ................................................................................................6-17
SIMCLK..................................................................................................6-18
CLKO1 ...................................................................................................6-18
CLKO2 ...................................................................................................6-18
PLL Power Pins .....................................................................................6-19
VCCSYN ................................................................................................6-19
GNDSYN................................................................................................6-19
XFC........................................................................................................6-19
CLKO Power Pins ..................................................................................6-19
VCCCLK ................................................................................................6-19
GNDCLK ................................................................................................6-19
Configuration Pins (MODCK1–MODCK0) .............................................6-19
Breakpoint Logic ....................................................................................6-20
External Bus Interface Control ...............................................................6-21
Initial Configuration ................................................................................6-22
Port D.....................................................................................................6-22
Port E .....................................................................................................6-23
Slave (Disable CPU32+) Mode ..............................................................6-23
MBAR in a Multiple QUICC System.......................................................6-24
Global Chip Select (CS0) in Slave Mode ...............................................6-25
Bus Clear in Slave Mode .......................................................................6-25
Interrupts in Slave Mode ........................................................................6-26
Pin Differences in Slave Mode...............................................................6-26
Other Functionality in Slave Mode .........................................................6-27
Programmer’s Model..............................................................................6-27
Module Base Address Register (MBAR)................................................6-27
Module Base Address Register Enable (MBARE) .................................6-29
System Configuration and Protection Registers ....................................6-29
Module Configuration Register (MCR)...................................................6-29
Autovector Register (AVR).....................................................................6-34
Reset Status Register (RSR) .................................................................6-34
Software Watchdog Interrupt Vector Register (SWIV)...........................6-35
System Protection Control Register (SYPCR) .......................................6-35
Periodic Interrupt Control Register (PICR).............................................6-37
Freescale Semiconductor, Inc.
For More Information On This Product,
MC68360 USER’S MANUAL
Go to: www.freescale.com
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