MC68MH360ZP33L Freescale Semiconductor, MC68MH360ZP33L Datasheet - Page 403

IC MPU 32BIT QUICC 357-PBGA

MC68MH360ZP33L

Manufacturer Part Number
MC68MH360ZP33L
Description
IC MPU 32BIT QUICC 357-PBGA
Manufacturer
Freescale Semiconductor
Datasheets

Specifications of MC68MH360ZP33L

Processor Type
M683xx 32-Bit
Speed
33MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
357-PBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-

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SMC2CS—SMC2 Clock Source (NMSI mode)
SMC1CS—SMC1 Clock Source (NMSI mode)
SDMx—SI Diagnostic Mode for TDM A or B
MOTOROLA
SMC2 can take its clocks from one of the baud rate generators or one of four pins from
the bank of clocks. The SMC2 transmit and receive clocks must be the same when it is
connected to the NMSI.
SMC1 can take its clocks from one of the baud rate generators or one of four pins from
the bank of clocks. The SMC1 transmit and receive clocks must be the same when it is
connected to the NMSI.
000 = SMC2 transmit and receive clocks are BRG1.
001 = SMC2 transmit and receive clocks are BRG2.
010 = SMC2 transmit and receive clocks are BRG3.
011 = SMC2 transmit and receive clocks are BRG4.
100 = SMC2 transmit and receive clocks are CLK5.
101 = SMC2 transmit and receive clocks are CLK6.
110 = SMC2 transmit and receive clocks are CLK7.
111 = SMC2 transmit and receive clocks are CLK8.
000 = SMC1 transmit and receive clocks are BRG1.
001 = SMC1 transmit and receive clocks are BRG2.
010 = SMC1 transmit and receive clocks are BRG3.
011 = SMC1 transmit and receive clocks are BRG4.
100 = SMC1 transmit and receive clocks are CLK1.
101 = SMC1 transmit and receive clocks are CLK2.
110 = SMC1 transmit and receive clocks are CLK3.
111 = SMC1 transmit and receive clocks are CLK4.
00 = Normal operation.
01 = Automatic Echo. In this mode, the channel_x transmitter automatically retransmits
10 = Internal Loopback. In this mode, the TDM transmitter output is internally connect-
11 = Loopback Control. In this mode, the TDM transmitter output is internally connect-
the TDM received data on a bit-by-bit basis. The receive section operates normal-
ly, but the transmit section can only retransmit received data. In this mode, the
L1GRx line is ignored.
ed to the TDM receiver input (L1TXDx is connected to L1RXDx). The receiver and
transmitter operate normally. The data appears on the L1TXDx pin. In this mode,
the L1RQx line is asserted normally. The L1GRx line is ignored.
ed to the TDM receiver input (L1TXDx is connected to L1RXDx). The transmitter
output (L1TXDx) and the L1RQx pin will be inactive. This mode is used to accom-
plish loopback testing of the entire TDM without affecting the external serial lines.
In modes 01,10, and 11, the receive and the transmit clocks
should be identical.
Freescale Semiconductor, Inc.
For More Information On This Product,
MC68360 USER’S MANUAL
Go to: www.freescale.com
NOTE
Serial Interface with Time Slot Assigner
7-79

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