MC68MH360ZP33L Freescale Semiconductor, MC68MH360ZP33L Datasheet - Page 531

• Manufacturer Part Number: MC68MH360ZP33L
• Description: IC MPU 32BIT QUICC 357-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68MH360ZP33L

• Processor Type: M683xx 32-Bit
• Speed: 33MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 357-PBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -

E—End of Table
B—BCS Expected
H—HUNT MODE
CHARACTER1–8—Control Character Value
RCCM—Received Control Character Mask
7.10.20.7 BSYNC-BISYNC SYNC REGISTER. The 16-bit, memory-mapped, read-write
BSYNC register is used to define the BISYNC stripping and insertion of the SYNC character.
When an underrun occurs during message transmission, the BISYNC controller will insert
SYNC characters until the next data buffer is available for transmission. When the BISYNC
MOTOROLA
These fields define control characters.
The value in this register is used to mask the comparison of CHARACTER1–8. The lower
eight bits of RCCM correspond to the lower eight bits of CHARACTER1–8, and are de-
coded as follows.
0 = This entry is valid. The lower eight bits will be checked against the incoming char-
1 = The entry is not valid. No valid entries exist beyond this entry.
0 = The character is written into the receive buffer. The buffer is then closed.
1 = The character is written into the receive buffer. The receiver waits for one LRC or
0 = The BISYNC controller will maintain character synchronization after closing this
1 = The BISYNC controller will enter hunt mode after closing the buffer. When the B bit
0 = Mask this bit in the comparison of the incoming character and CHARACTER1–8.
1 = The address comparison on this bit proceeds normally. No masking occurs.
acter.
two CRC bytes of BCS and then closes the buffer. This should be used for ETB,
ETX, and ITB.
buffer.
is set, the controller will enter hunt mode after the reception of the BCS.
In tables with 8 control characters, the E-bit should be zero in all
eight positions.
A maskable interrupt is generated after the buffer is closed.
When using 7-bit characters with parity, the parity bit should be
included in the control character value.
Bits 15 through 13 of RCCM must be set, or erratic operation
may occur during the control character recognition process.
Freescale Semiconductor, Inc.
For More Information On This Product,
MC68360 USER’S MANUAL
Go to: www.freescale.com
NOTE
NOTE
NOTE
NOTE
Serial Communication Controllers (SCCs)
7-207