MC68MH360ZP33L Freescale Semiconductor, MC68MH360ZP33L Datasheet - Page 466

• Manufacturer Part Number: MC68MH360ZP33L
• Description: IC MPU 32BIT QUICC 357-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68MH360ZP33L

• Processor Type: M683xx 32-Bit
• Speed: 33MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 357-PBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -

Serial Communication Controllers (SCCs)
Since the transmitter and receiver work asynchronously, there is no need to connect trans-
mit and receive clocks. Instead, the receiver oversamples the incoming data stream (usually
by a factor of 16) and uses some of these samples to determine the bit value. Traditionally
the middle three samples of the sixteen samples are used. Two UARTs can communicate
using a system like this if parameters, such as the parity scheme and character length, are
the same for both transmitter and receiver.
When data is not transmitted in the UART protocol, a continuous stream of ones is transmit-
ted, called the idle condition. Since the start bit is always a zero, the receiver can detect
when real data is once again present on the line. UART also specifies an all-zeros character
called a break, which is used to abort a character transfer sequence.
Many different protocols have been defined using asynchronous characters, but the most
popular of these is the RS-232 standard. RS-232 specifies standard baud rates, handshak-
ing protocols, and mechanical/electrical details. Another popular standard using the same
character format is RS-485, which defines a balanced line system allowing longer cables
than RS-232 links. Synchronous protocols like HDLC are sometimes defined to run over
asynchronous links. Other protocols like Profibus extend the UART protocol to include LAN-
oriented features such as token passing.
All the standards provide handshaking signals, but some systems require just three physical
lines: transmit data, receive data, and ground.
Many proprietary standards have been built around the asynchronous character frame, and
some even implement a multidrop configuration. In multidrop systems, more than two sta-
tions may be present on a network, with each having a specific address. Frames made up
of many characters may be broadcast, with the first character acting as a destination
address. To allow this, the UART frame is extended by one bit to distinguish between an
address character and the normal data characters.
Additionally, a synchronous form of the UART protocol exists where start and stop bits are
still present, but a clock is provided with each bit, so the oversampling technique is not
required. This mode is called "isochronous" operation or, more often, synchronous UART.
7-142
8 ,16 , OR 32
UART TCLK
UART TXD
START
BIT
Freescale Semiconductor, Inc.
Figure 7-46. UART Character Format
For More Information On This Product,
MC68360 USER’S MANUAL
Go to: www.freescale.com
5, 6, 7, OR 8 DATA BITS WITH THE
LEAST SIGNIFICANT BIT FIRST
ADDR.
OPTIONAL
BIT
(CLOCK NOT TO SCALE)
PAR.
BIT
9/16 TO 2
STOP BITS
MOTOROLA