TMPM364F10FG Toshiba, TMPM364F10FG Datasheet - Page 521

• Manufacturer Part Number: TMPM364F10FG
• Manufacturer: Toshiba

Specifications of TMPM364F10FG

• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 1024K
• Rom Type: Flash
• Ram (kbytes): 64K
• Number Of Pins: 144
• Package: LQFP(20x20)
• Vcc: 3V
• Cpu Mhz: 64
• Ssp (ch) Spi: 1
• I2c/sio (ch): 5
• Uart/sio (ch): 12
• Usb: Host
• Can: 1
• Ethernet: -
• External Bus Interface: Y
• Cs/wait Controller (ch): 4
• Dma Controller: 2
• 10-bit Da Converter: -
• 10-bit Ad Converter: 16
• 12-bit Ad Converter: -
• 16-bit Timer / Counter: 16
• Motor / Igbt Control: -
• Real Time Clock: Y
• Watchdog Timer: Y
• Osc Freq Detect: -
• Clock Gear: Y
• Low-power Hold Function: Y
• Remote Control Interface: Y
• Hardware Cec Controller: Y
• Comparators: -
• Low-voltage Detector: -
• Etm Hardware Trace: 4-bit

15.3.5
31-1
0
bit symbol
After reset
bit symbol
After reset
bit symbol
After reset
bit symbol
After reset
Bit
−
CECREN
Note 1: Enable the <CECREN> bit after setting the CECRCR1, CECRCR2 and CECRCR3.
Note 2: It takes a little time to reflect the setting of the <CECREN> bit to the circuit. Make sure that the register is under
Bit Symbol
CECREN (Receive Enable Register)
31
23
15
0
0
0
7
0
-
-
-
-
suspension when you try to change settings or to enable disableed-settings.
R
R/W
Type
30
22
14
0
0
0
6
0
Read as 0
Reception control
[Write] 0 : Disabled
1 : Enabled
[Read] 0 : Stopped
1 : In operation
Controls the reception operation of CEC.
Writing "0" or "1" to this bit enables or disables data reception. This bit becomes ready for data reception
by
writing "1".
The state of the reception circuit is monitored by reading this bit. It enables you to check if what you set has
properly been reflected.
-
-
-
-
29
21
13
0
0
0
5
0
-
-
-
-
Page 495
28
20
12
0
0
0
4
0
-
-
-
-
27
19
11
Function
0
0
0
3
0
-
-
-
-
26
18
10
0
0
0
2
0
-
-
-
-
25
17
0
0
9
0
1
0
-
-
-
-
TMPM364F10FG
Undefined
CECREN
24
16
0
0
8
0
0
-
-
-