TMPM364F10FG Toshiba, TMPM364F10FG Datasheet - Page 687
TMPM364F10FG
Manufacturer Part Number
TMPM364F10FG
Description
Manufacturer
Toshiba
Datasheet
1.TMPM364F10FG.pdf
(838 pages)
Specifications of TMPM364F10FG
Product Summaries
Summary
Lead Free
Yes
Rohs Compatible Product(s)
Available
Rom (kbytes)
1024K
Rom Type
Flash
Ram (kbytes)
64K
Number Of Pins
144
Package
LQFP(20x20)
Vcc
3V
Cpu Mhz
64
Ssp (ch) Spi
1
I2c/sio (ch)
5
Uart/sio (ch)
12
Usb
Host
Can
1
Ethernet
-
External Bus Interface
Y
Cs/wait Controller (ch)
4
Dma Controller
2
10-bit Da Converter
-
10-bit Ad Converter
16
12-bit Ad Converter
-
16-bit Timer / Counter
16
Motor / Igbt Control
-
Real Time Clock
Y
Watchdog Timer
Y
Osc Freq Detect
-
Clock Gear
Y
Low-power Hold Function
Y
Remote Control Interface
Y
Hardware Cec Controller
Y
Comparators
-
Low-voltage Detector
-
Etm Hardware Trace
4-bit
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21. Backup module
21.1
21.2
PC
PD
PG
PH
PO
tion. By cutting electricity to the entire block, such as CPU or other peripheral IPs, other than the backup module,
this mode significantly reduces power consumption.
PA
PB
PE
PF
PK
PP
The BACKUP mode, one of the system operation modes, enable the MCU to operate in the low power consump-
The BACKUP mode contains two modes :
Features
Block Diagram
-
-
BACKUP SLEEP mode (enabling low frequency oscillator)
BACKIUP STOP mode (disabling low frequency oscillator)
Keep
Logic
Power shutdown blocks in the BACKUP mode
Port
Logic
Figure 21-1 Power shutdown blocks in the backup mode
DVSS AVSS AVDD3 VREFH
DVDD3B / RVDD3
Converter
Other Logic
Flash ROM
Main RAM
Regulator
(1024KB)
(56KB)
AD
CPU,
PLL
Page 661
DVDD3A
Backup RAM
KWUP,RTC
CEC,RMC
X1
(8KB)
High-OSC
DVSS
X2
Regulator and
Backup Cont.
Generator
Clock
XT1
Low-OSC
XT2
TMPM364F10FG
Port
Logic
PL
PM
PI
PJ
PN
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