TMPM364F10FG Toshiba, TMPM364F10FG Datasheet - Page 548

• Manufacturer Part Number: TMPM364F10FG
• Manufacturer: Toshiba

Specifications of TMPM364F10FG

• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 1024K
• Rom Type: Flash
• Ram (kbytes): 64K
• Number Of Pins: 144
• Package: LQFP(20x20)
• Vcc: 3V
• Cpu Mhz: 64
• Ssp (ch) Spi: 1
• I2c/sio (ch): 5
• Uart/sio (ch): 12
• Usb: Host
• Can: 1
• Ethernet: -
• External Bus Interface: Y
• Cs/wait Controller (ch): 4
• Dma Controller: 2
• 10-bit Da Converter: -
• 10-bit Ad Converter: 16
• 12-bit Ad Converter: -
• 16-bit Timer / Counter: 16
• Motor / Igbt Control: -
• Real Time Clock: Y
• Watchdog Timer: Y
• Osc Freq Detect: -
• Clock Gear: Y
• Low-power Hold Function: Y
• Remote Control Interface: Y
• Hardware Cec Controller: Y
• Comparators: -
• Low-voltage Detector: -
• Etm Hardware Trace: 4-bit

15.4
Operations
15.4.3.3
15.4.3.4
EN <CECTEN> bit.
can identify the interrupt factor by checking these bits.
(1)
Error detection during transmission generates an interrupt and stops transmission. It clears the CECT-
To identify an error factor, the CECTSTAT register has bits that correspond with each interrupt. You
Note:An attempt to stop transmission by an error may cause an improper waveform output to CEC. This
Detecting Transmission Error
Details of Transmission Error
Start bit
Data bit
ACK bit
EOMbit
is because output is stopped immediately after the error occurs.
An arbitration lost error occurs when CEC detects "Low" on completion of appropriate low duration.
Detecting an arbitration lost error sets the CECTSTAT <CECTIAL> bit.
Two types of the arbitration lost detection periods are shown below.
Arbitration Lost
Maximum “0”
output time
1.7 ms
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“0” output time
0.3 ms
2.0 ms
Detection
0.3 ms
period
Detection
period
Cycle setting :
CECTCR<CECDPRD>
Beginning of
the next bit
TMPM364F10FG