P60ARM-B Zarlink Semiconductor, Inc., P60ARM-B Datasheet - Page 66

• Manufacturer Part Number: P60ARM-B
• Description: 32-bit RISC microprocessor
• Manufacturer: Zarlink Semiconductor, Inc.

P60ARM-B
Div2
4.15.2 Pseudo random binary sequence generator
It is often necessary to generate (pseudo-) random numbers and the most efficient algorithms are based on
shift generators with exclusive-OR feedback rather like a cyclic redundancy check generator. Unfortunately
the sequence of a 32 bit generator needs more than one feedback tap to be maximal length (i.e. 2^32-1 cycles
before repetition), so this example uses a 33 bit register with taps at bits 33 and 20. The basic algorithm is
newbit:=bit 33 eor bit 20, shift left the 33 bit number and put in newbit at the bottom; this operation is
performed for all the newbits needed (i.e. 32 bits). The entire operation can be done in 5 S cycles:
4.15.3 Multiplication by constant using the barrel shifter
(1)
(2)
(3)
62
BCC
MOV
CMP
SUBCS
ADDCS
MOVS
MOVNE
BNE
TST
MOVS
ADC
EOR
EOR
Multiplication by 2^n (1,2,4,8,16,32..)
MOV
Multiplication by 2^n+1 (3,5,9,17..)
ADD
Multiplication by 2^n-1 (3,7,15..)
RSB
Div1
Rc,#0
Ra,Rb
Ra,Ra,Rb
Rc,Rc,Rcnt
Rcnt,Rcnt,LSR#1
Rb,Rb,LSR#1
Div2
Rb,Rb,LSR#1
Rc,Ra,RRX
Rb,Rb,Rb
Rc,Rc,Ra,LSL#12
Ra,Rc,Rc,LSR#20
Ra, Rb, LSL #n
Ra,Ra,Ra,LSL #n
Ra,Ra,Ra,LSL #n
; test for possible subtraction
; subtract if ok
; put relevant bit into result
; shift control bit
; halve unless finished
;
; divide result in Rc
; remainder in Ra
; enter with seed in Ra (32 bits),
;
; top bit into carry
; 33 bit rotate right
; carry into lsb of Rb
; (involved!)
; (similarly involved!)
;
; new seed in Ra, Rb as before
Rb (1 bit in Rb lsb), uses Rc