CDC3205G-C Micronas, CDC3205G-C Datasheet - Page 112

• Manufacturer Part Number: CDC3205G-C
• Description: Automotive Controller Family The Device is a Microcontroller For Use in Automotive Applications.the On-chip Cpu is an Arm Processor ARM7TDMI with 32-bit Data And Address Bus, Which Supports Thumb format Instructions.
• Manufacturer: Micronas

CDC 32xxG-C
a 1us setup time before usage. When the buffer is never
used, leave flag AD1.BUF cleared. When the buffer is always
used, leave this flag set. When toggling buffer usage, set this
flag at least 1us before starting a conversion.
Before starting a conversion, check flag AD0.EOC to be set.
A conversion is started by a write access to register AD0,
selecting sample time (AD0.TSAM), reference source
(AD0.REF) and input channel (AD0.CHANNEL).
Sampling starts one f
write access to AD0. Flag AD0.EOC signals the end of con-
version. The 10-bit result is stored in the registers AD1 (8
MSB) and AD0.
The conversion time depends on f
sample time (Table 15–2).
For the effect of CPU clock modes on the operation of this
module refer to section “CPU and Clock System” (see
Table 4–1 on page 37).
15.6.1.1. Conversion Law
The result of A/D conversion is described by the following for-
mula:
DV
DV = Digital Value; INT = Integer part of the result
Fig. 15–3:
The voltage on the reference-input pins VREF, VREF0 and
VREF1 may be set to any level in the range from AV
AV
2.56V (1 LSB = 0.25mV) to 5.12V (1 LSB = 0.5mV).
15.6.1.2. Measurement Errors
The result of the conversion mirrors the voltage potential of
the sampling capacitance (typically 8pF) at the end of the
sampling time. This capacitance has to be charged by the
source through the source impedance within the sampling-
time period. To avoid measurement errors, system design
110
3FF
3FE
3FD
DD
DV
03
02
01
00
. However, accuracy is only specified in the range from
=
INT
1
Characteristic Curve
2 3
------------- -
1LSB
U
In
0
clock cycle after completion of the
where
1021 1023
0
and the programmed
1LSB
U
=
In
June 12, 2003; 6251-579-1PD
----------- -
1024
U
[LSB]
Ref
SS
to
has to make sure that at the end of this sampling period, the
voltage on the sampling capacitance is within 0.1 LSB from
the source voltage.
Measurement errors may occur, when the voltage of high-
impedance sources has to be measured:
– To reduce these errors, the sampling time may be
– In cases where high-impedance sources are only rarely
– In some high-impedance applications a charge-pumping
increased by programming the field AD0.TSAMP.
sampled, a 100nF capacitor from the input to AVSS is a
sufficient measure to ensure that the voltage on the sam-
pling capacitance reaches the full source voltage, even
with the shortest sampling time.
effect may noticeably influence the measurement result:
Charge pumping from a high-potential to a low-potential
source will occur when such two sources are measured
alternatingly. This results in a current that appears as
flowing from the high-potential source through the IC into
the low-potential source. This current explains from the
fact that during the respective sampling period the high-
potential source always charges the sampling capaci-
tance, while the low-potential source always discharges it.
Usage of the input buffer (AD1.BUF) substantially reduces
this effect.
PRELIMINARY DATA SHEET
Micronas