CDC3205G-C Micronas, CDC3205G-C Datasheet - Page 46
CDC3205G-C
Manufacturer Part Number
CDC3205G-C
Description
Automotive Controller Family The Device is a Microcontroller For Use in Automotive Applications.the On-chip Cpu is an Arm Processor ARM7TDMI with 32-bit Data And Address Bus, Which Supports Thumb format Instructions.
Manufacturer
Micronas
Datasheet
1.CDC3205G-C.pdf
(260 pages)
- Current page: 46 of 260
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CDC 32xxG-C
4.6. Registers
ACT
r1:
r0:
LCK
r1:
r0:
PLLM
r1:
r0:
PMF
w0:
w15-1:
TSEL
r/w
EOM
r/w3:
r/w2:
r/w1:
r/w0:
TOL
r/w15-0:
INPH
r1:
r0:
SUP
r/w63-0
44
r/w
r/w
r/w
r/w
r/w
PLLC
ERMC
INPH
ACT
x
x
7
7
EOM
f
LCK
SYS
x
x
6
x
6
Starts PLL with the corresponding frequency.
PLL Active
PLL started (PMF > 0)
PLL not activated (PMF = 0)
PLL Locked
PLL locked
PLL not locked
PLL Mode Acknowledge
The clock chain has switched to PLL mode
Not PLL mode
PLL Multiplication Factor (Table 4–6)
PLL is switched off and internally bypassed.
This is the standby mode for the PLL.
If not active anyway, the VREFINT Generator
and BVDD Regulator are enabled
PMF is a write only field. Don’t modify PMF
in PLL mode.
Above formula relates to PLL mode.
Test Select
Factory use only.
ERM Operation Mode
Mode 3
Mode 2
Mode 1
Off
Clock Tolerance
(see Table 4–6 and 4–7)
In Phase (during deactivation)
Phase is 0 or 1
Phase > 1
Suppression Strength
(see Table 4–6 and 4–7)
=
n f
PLLM
PLL Control
ERM Control
x
x
x
5
5
XTAL
0x00000000
x
=
x
x
4
x
4
TSEL
PMF
0
x
3
3
+
SUP
1
0
x
2
2
f
XTAL
PMF
TOL
0
x
1
1
June 12, 2003; 6251-579-1PD
0
x
0
0
Res
3
2
1
0
Res
IOP
w
NWS
w:
SWS
w:
The WSR influences access to ROM, Flash and Boot ROM.
CO00, CO01 Clock Out Bit 0 and 1
w:
Table 4–5:
w
CO01
0
0
1
1
w
w
IOC
WSR
CO0SEL
x
x
x
x
7
7
7
f
0
CO00
0
1
0
1
=
x
x
x
x
6
6
6
CO00 and CO01 Usage
I/O Clock Prescaler (Table 4–6)
IOP is a write only field.
Above formula relates to PLL mode.
Nonsequential Wait State Bits
Number of wait states at nonsequential
memory access.
Sequential Wait State Bits
Number of wait states at sequential access.
Clock selection
f
----------
NWS
SYS
m
I/O Control
Wait State Register
Clock Out 0 Selection
=
x
x
x
x
5
5
5
Selection
CO0
CO0
SMX Out (Power Saving Module)
f
XTAL
------------------ -
IOP
f
SYS
Mux0
Mux1
x
x
+
x
x
4
4
4
PRELIMINARY DATA SHEET
0x00
1
=
x
x
PMF
-------------------- - f
x
x
3
3
3
IOP
+
+
0
1
x
x
2
2
2
1
SWS
XTAL
CO01
IOP
0
0
1
1
1
Micronas
CO00
0
0
0
0
0
Res
Res
Res
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