CDC3205G-C Micronas, CDC3205G-C Datasheet - Page 168

• Manufacturer Part Number: CDC3205G-C
• Description: Automotive Controller Family The Device is a Microcontroller For Use in Automotive Applications.the On-chip Cpu is an Arm Processor ARM7TDMI with 32-bit Data And Address Bus, Which Supports Thumb format Instructions.
• Manufacturer: Micronas

CDC 32xxG-C
26.2. Registers
Writing this register moves I
and ACK=1 into the Write FIFO.
Writing this register moves I
and ACK=0 into the Write FIFO.
Writing this register moves I
Write FIFO.
Writing this register moves I
Write FIFO.
Writing this register moves I
condition into the Write FIFO.
166
w
w
w
w
w
w
I2CWS0x
I2CWS1x
I2CWD0x
I2CWD1x
I2CWP0x
I2CWP1x
7
7
7
7
7
7
6
6
6
6
6
6
I2C Write Start Register 0
I2C Write Start Register 1
I2C Write Data Register 0
I2C Write Data Register 1
I2C Write Stop Register 0
I2C Write Stop Register 1
5
5
5
5
5
5
I2C Address
I2C Address
4
4
4
4
4
4
I2C Data
I2C Data
I2C Data
I2C Data
0x00
0x00
0x00
0x00
0x00
0x00
2
2
2
2
2
C start condition, I
C start condition, I
C Data, ACK=1 and I
C Data and ACK=1 into the
C Data and ACK=0 into the
3
3
3
3
3
3
2
2
2
2
2
2
1
1
1
1
1
1
2
2
C Address
C Address
June 12, 2003; 6251-579-1PD
0
0
0
0
0
0
2
C stop
Res
Res
Res
Res
Res
Res
Writing this register moves I
condition into the Write FIFO.
Reading this register returns the content of the Read FIFO.
OACK
r:
AACK
r1:
r0:
DACK
r1:
r0:
BUSY
r1:
r0:
WFH
r1:
r0:
RFE
r1:
r0:
DGL
w1:
w0:
If the deglitcher is active, the maximum bit rate is limited.
SPEED must be programmed to 6 at least. The maximum bit
rate may be further reduced by the bus load.
w
I2CRDx
I2CRSx
I2CMx
r
r
DGL
x
0
1
7
7
7
OACK
0
6
6
6
"OR"ed Acknowledge
AACK OR DACK.
Address Acknowledge
Not acknowledged (received a one)
Acknowledged (received a zero)
Data Acknowledge
Not acknowledged (received a one)
Acknowledged (received a zero)
Busy
I
I
Write-FIFO Half Full
Write-FIFO contains exactly 3 bytes.
Write-FIFO contains more or less than
3 bytes.
Read-FIFO Empty
Read-FIFO is empty.
Read-FIFO is not empty.
Input Deglitcher
Deglitcher is active.
Deglitcher is bypassed.
2
2
C Master Interface is busy.
C Master Interface is not busy.
AACK
I2C Read Data Register
I2C Read Status Register
I2C Mode Register
0
5
5
5
DACK
0
4
4
4
PRELIMINARY DATA SHEET
I2C Data
0x00
2
C Data, ACK=0 and I
SPEED
BUSY
0x02
0
3
3
3
WFH
0
2
2
2
RFE
0
1
1
1
Micronas
x
0
0
0
0
2
C stop
Res
Res
Res