CDC3205G-C Micronas, CDC3205G-C Datasheet - Page 188

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CDC3205G-C

Manufacturer Part Number
CDC3205G-C
Description
Automotive Controller Family The Device is a Microcontroller For Use in Automotive Applications.the On-chip Cpu is an Arm Processor ARM7TDMI with 32-bit Data And Address Bus, Which Supports Thumb format Instructions.
Manufacturer
Micronas
Datasheet
CDC 32xxG-C
28.2.2. Bus Reset
The rising edge of a bit or bus clock is only controlled by the
bus node which generates the bus clock (clock master). No
other bus node may hold down the bus line at that moment.
When the clock master releases the bus line at the end of a
bit, he must watch the bus line. If the bus level does not rise
after at least 1/2 bit time, this must be interpreted as a proto-
col violation. Delay of 1/2 of a bit time is the latest moment
for a master. He can indicate this protocol violation if the ris-
ing edge is delayed 1/8 bit time. Slaves may use this mecha-
nism to signal an exception to the master. They must pull
down the bus for at least 2 bit times. After such an event nor-
mal communication may be impossible until the PLL of bus
nodes have synchronized again.
28.2.3. Phase Correction
On a physical bus the signal edges may be delayed by the
bus load. An extra delay may be added by different trigger
edges. The bus nodes see the edges at different times. This
cause them to pull the bus line delayed. To compensate this
28.3. Standard Functions
The following standard functions have to be included in every
DIGITbus implementation.
28.3.1. Send Bus Clock
The Bus Clock is the sequence of T-Signs on the DIGITbus.
The rising edges of the bus signal are of constant distance.
Only one bus node may generate this Bus Clock even in a
multi master system. All bus nodes use this stream of T-
Signs to generate telegrams. The bus clock generator knows
two states. “Active Bus” means the transmission of the Bus
Clock. “Passive Bus” means permanent high bus level. “Pas-
sive Bus” may be a low power mode.
28.3.2. Receive Bus Clock
Bus nodes which does not generate the bus clock need an
internal clock for their operation. They may use a separate
clock source or derive their clock from the bus clock by a
PLL. Bus nodes which use own clock sources nevertheless
have to synchronize on the bus clock if they want to transmit
or receive data.
28.3.3. Send Address
The Address is the first bit field in a telegram. Only a master
may send this field. The sender must guarantee, that at least
two consecutive T-Signs have been visible on the DIGITbus
before sending this field. Therefore he has to send four T-
Signs. If one of those four transmitted T-signs is disturbed,
only one of the separated telegrams is corrupted for a
receiver. Sending of an address requires synchronization on
the bus clock and, in case of a multi master system, collision
detection and arbitration capability.
28.3.4. Receive Address
Each slave and all multi master capable bus nodes must be
able to receive an address. For a receiver a valid address
field must be preceded by two consecutive T-Signs. To verify
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effect the phase correction mechanism allows the bus node
to adjust their internal counters.
The master sends a special address to which the slave
answers with a single zero. The master measures the time
between the rising and the falling edge. With this value he
can calculate a phase correction value and transmit it to the
slave. The slave may use it to adjust his internal counter.
The Phase Correction has to be done for each bus node sep-
arately.
28.2.4. Abort Transmission
The Abort Transmission feature is an option that allows the
implementation of some kind of rip cord with the DIGITbus.
On an alarm event, the SW of the sending master bus node
may break the current telegram and send another telegram
instead. The reception of an address/data field can not be
stopped. The transmission of the alarm telegram is delayed
until after the end of the reception in this case. Only the
actual sending bus node can abort the transmission.
a received address it is not sufficient to compare the value.
The length of the address must be correct too because of the
arbitrary length of the address field.
28.3.5. Send Data
Each master must be and some slaves are able to send a
data field. A data field is preceded by an address or data field
and one T-Sign.
28.3.6. Receive Data
Each master must be and some slaves are able to receive a
data field. A data field is preceded by an address or data field
and one T-Sign. It is a good idea to verify the length of a
received data field if possible. But variable length data fields
are possible too.
28.3.7. Collision Detection
Collision detection together with arbitration is necessary in
multi master systems. It is necessary to avoid the distur-
bance of telegrams if two masters try to send a telegram at
the same time. As long as both transmit the same sign (one
or zero) at the same time, they don’t detect a collision. If one
master is sending a one and the other is sending a zero, a
zero will be seen at the bus. In this case the master whose
one was modified to the zero stops immediately sending. He
should receive this telegram.
The sender has to arbitrate his part of the telegram.
Write telegram: TTTTTAAAATDDDDTTTTT
Read telegram: TTTTTAAAATDDDDTTTTT
The separator (T-Sign) after an address or data field is object
of arbitration too.
In a single master system arbitration loss has to be managed
as a bus error.
PRELIMINARY DATA SHEET
Micronas

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