UPSD3234AV-24U1T STMicroelectronics, UPSD3234AV-24U1T Datasheet - Page 101

• Manufacturer Part Number: UPSD3234AV-24U1T
• Description: Flash Programmable System Devices with 8032 Microcontroller Core and 64Kbit SRAM
• Manufacturer: STMicroelectronics

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Table 85. Instructions
Note: 1. All bus cycles are WRITE bus cycles, except the ones with the “Read” label
READ
READ Sector
Protection
Program a Flash
Byte
Flash Sector
Erase
Flash Bulk
Erase
Suspend Sector
Erase
Resume Sector
Erase
RESET
Unlock Bypass
Unlock Bypass
Program
Unlock Bypass
Reset
Instruction
10. Sector Select (FS0-FS7 or CSBOOT0-CSBOOT3) signals are active High, and are defined in PSDsoft Express.
11. Only address Bits A11-A0 are used in instruction decoding.
12. No Unlock or instruction cycles are required when the device is in the READ Mode
13. The RESET instruction is required to return to the READ Mode after reading the Sector Protection Status, or if the Error Flag Bit
14. Additional sectors to be erased must be written at the end of the Sector Erase instruction within 80µs.
15. The data is 00h for an unprotected sector, and 01h for a protected sector. In the fourth cycle, the Sector Select is active, and
16. The Unlock Bypass instruction is required prior to the Unlock Bypass Program instruction.
17. The Unlock Bypass Reset Flash instruction is required to return to reading memory data when the device is in the Unlock Bypass
18. The system may perform READ and Program cycles in non-erasing sectors, read the Flash ID or read the Sector Protection Status
19. The Resume Sector Erase instruction is valid only during the Suspend Sector Erase Mode.
20. The MCU cannot invoke these instructions while executing code from the same Flash memory as that for which the instruction is
(13)
2. All values are in hexadecimal:
3. X = Don’t care. Addresses of the form XXXXh, in this table, must be even addresses
4. RA = Address of the memory location to be read
5. RD = Data READ from location RA during the READ cycle
6. PA = Address of the memory location to be programmed. Addresses are latched on the falling edge of WRITE Strobe (WR, CNTL0).
7. PA is an even address for PSD in Word Programming Mode.
8. PD = Data word to be programmed at location PA. Data is latched on the rising edge of WRITE Strobe (WR, CNTL0)
9. SA = Address of the sector to be erased or verified. The Sector Select (FS0-FS7 or CSBOOT0-CSBOOT3) of the sector to be
(7,13)
(13)
(11)
(12)
(10)
(5)
erased, or verified, must be Active (High).
(DQ5/DQ13) goes High.
(A1,A0)=(1,0)
Mode.
when in the Suspend Sector Erase Mode. The Suspend Sector Erase instruction is valid only during a Sector Erase cycle.
intended. The MCU must retrieve, for example, the code from the secondary Flash memory when reading the Sector Protection
Status of the primary Flash memory.
(6)
(9)
(6,8,13)
FS0-FS7 or
CSBOOT0-
CSBOOT3
1
1
1
1
1
1
1
1
1
1
1
“Read”
RD @ RA
AAh@
X555h
AAh@
X555h
AAh@
X555h
AAh@
X555h
B0h@
XXXXh
30h@
XXXXh
F0h@
XXXXh
AAh@
X555h
A0h@
XXXXh
90h@
XXXXh
Cycle 1
uPSD3234A, uPSD3234BV, uPSD3233B, uPSD3233BV
55h@
XAAAh
55h@
XAAAh
55h@
XAAAh
55h@
XAAAh
55h@
XAAAh
PD@ PA
00h@
XXXXh
Cycle 2
90h@
X555h
A0h@
X555h
80h@
X555h
80h@
X555h
20h@
X555h
Cycle 3
Read status @
XX02h
PD@ PA
AAh@ X555h
AAh@ X555h
Cycle 4
55h@
XAAAh
55h@
XAAAh
Cycle 5
30h@
SA
10h@
X555h
Cycle 6
30h
next SA
Cycle 7
101/170
7
@