UPSD3234AV-24U1T STMicroelectronics, UPSD3234AV-24U1T Datasheet - Page 107

• Manufacturer Part Number: UPSD3234AV-24U1T
• Description: Flash Programmable System Devices with 8032 Microcontroller Core and 64Kbit SRAM
• Manufacturer: STMicroelectronics

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Suspend Sector Erase. When a Sector Erase
cycle is in progress, the Suspend Sector Erase in-
struction can be used to suspend the cycle by writ-
ing 0B0h to any address when an appropriate
Sector Select (FS0-FS7 or CSBOOT0-CSBOOT3)
is High. (See
reading of data from another Flash memory sector
after the Erase cycle has been suspended. Sus-
pend Sector Erase is accepted only during an
Erase cycle and defaults to READ Mode. A Sus-
pend Sector Erase instruction executed during an
Erase time-out period, in addition to suspending
the Erase cycle, terminates the time out period.
The Toggle Flag Bit (DQ6) stops toggling when the
internal logic is suspended. The status of this bit
must be monitored at an address within the Flash
memory sector being erased. The Toggle Flag Bit
(DQ6) stops toggling between 0.1µs and 15µs af-
ter the Suspend Sector Erase instruction has been
executed. The Flash memory is then automatically
set to READ Mode.
If an Suspend Sector Erase instruction was exe-
cuted, the following rules apply:
–
–
–
–
Table 87. Sector Protection/Security Bit Definition – Flash Protection Register
Note: 1. Bit Definitions:
Table 88. Sector Protection/Security Bit Definition – Secondary Flash Protection Register
Note: 1. Bit Definitions:
Bit 7
Sec7_Prot
Bit 7
Security_Bit
Attempting to read from a Flash memory
sector that was being erased outputs invalid
data.
Reading from a Flash sector that was not
being erased is valid.
The Flash memory cannot be programmed,
and only responds to Resume Sector Erase
and Reset Flash instructions (READ is an
operation and is allowed).
If a Reset Flash instruction is received, data in
the Flash memory sector that was being
erased is invalid.
Sec<i>_Prot 1 = Primary Flash memory or secondary Flash memory Sector <i> is write-protected.
Sec<i>_Prot 0 = Primary Flash memory or secondary Flash memory Sector <i> is not write-protected.
Sec<i>_Prot 1 = Secondary Flash memory Sector <i> is write-protected.
Sec<i>_Prot 0 = Secondary Flash memory Sector <i> is not write-protected.
Security_Bit 0 = Security Bit in device has not been set; 1 = Security Bit in device has been set.
Bit 6
Sec6_Prot
Bit 6
not used
Table 85., page
Bit 5
Sec5_Prot
Bit 5
not used
101). This allows
uPSD3234A, uPSD3234BV, uPSD3233B, uPSD3233BV
Bit 4
Sec4_Prot
Bit 4
not used
Bit 3
Sec3_Prot
Bit 3
Sec3_Prot
Resume Sector Erase. If a Suspend Sector
Erase instruction was previously executed, the
erase cycle may be resumed with this instruction.
The Resume Sector Erase instruction consists of
writing 030h to any address while an appropriate
Sector Select (FS0-FS7 or CSBOOT0-CSBOOT3)
is High. (See
Specific Features
Flash Memory Sector Protect. Each
and secondary Flash memory sector can be sepa-
rately protected against Program and Erase cy-
cles. Sector Protection provides additional data
security because it disables all Program or Erase
cycles. This mode can be activated through the
JTAG Port or a Device Programmer.
Sector protection can be selected for each sector
using the PSDsoft Express Configuration pro-
gram. This automatically protects selected sectors
when the device is programmed through the JTAG
Port or a Device Programmer. Flash memory sec-
tors can be unprotected to allow updating of their
contents using the JTAG Port or a Device Pro-
grammer. The MCU can read (but cannot change)
the sector protection bits.
Any attempt to program or erase a protected Flash
memory sector is ignored by the device. The Verify
operation results in a READ of the protected data.
This allows a guarantee of the retention of the Pro-
tection status.
The sector protection status can be read by the
MCU through the Flash memory protection regis-
ters (in the CSIOP block). See Tables
Bit 2
Sec2_Prot
Bit 2
Sec2_Prot
Table 85., page
Bit 1
Sec1_Prot
Bit 1
Sec1_Prot
101.)
Bit 0
Sec0_Prot
Bit 0
Sec0_Prot
87
and 88.
primary
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