UPSD3234AV-24U1T STMicroelectronics, UPSD3234AV-24U1T Datasheet - Page 76

• Manufacturer Part Number: UPSD3234AV-24U1T
• Description: Flash Programmable System Devices with 8032 Microcontroller Core and 64Kbit SRAM
• Manufacturer: STMicroelectronics

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uPSD3234A, uPSD3234BV, uPSD3233B, uPSD3233BV
Special Function Register for the DDC Interface
There are eight SFR in the DDC interface:
RAMBUF, DDCCON, DDCADR, DDCDAT are
DDC registers.
S1CON, S1STA, S1DAT, S1ADR are I
face registers, same as the ones described in the
standalone I
DDCDAT Register. DDC1 DATA register for
transmission (DDCDAT: 0D5H)
Table 60. DDC SFR Memory Map
76/170
Addr
SFR
D4 RAMBUF
D5 DDCDAT
D6 DDCADR
D7 DDCCON
8-bit READ and WRITE register.
Indicates DATA BYTE to be transmitted in
DDC1 protocol.
Name
Reg
2
C bus.
—
7
EX_DAT SWENB DDC_AX DDCINT DDC1EN SWHINT
6
5
2
C Inter-
Bit Register Name
4
DDCADR Register. Address pointer for DDC in-
terface (DDCADR: 0D6H)
3
8-bit READ and WRITE register.
Address pointer with the capability of the post
increment. After each access to RAMBUF
register (either by software or by hardware
DDC1 interface), the content of this register
will be increased by one. It’s available both in
DDC1, DDC2 (DDC2B, DDC2B+, and
DDC2AB) and system operation.
2
1
M0
0
Reset
Value
XX
00
00
00
DDC Control
xmit register
Addr pointer
Comments
DDC Ram
DDC Data
Register
register
Buffer