UPSD3234AV-24U1T STMicroelectronics, UPSD3234AV-24U1T Datasheet - Page 50

• Manufacturer Part Number: UPSD3234AV-24U1T
• Description: Flash Programmable System Devices with 8032 Microcontroller Core and 64Kbit SRAM
• Manufacturer: STMicroelectronics

w w w . D a t a S h e e t 4 U . c o m
uPSD3234A, uPSD3234BV, uPSD3233B, uPSD3233BV
Mode 0. Putting either Timer into Mode 0 makes
it look like an 8048 Timer, which is an 8-bit Counter
with a divide-by-32 prescaler.
shows the Mode 0 operation as it applies to
Timer1.
In this mode, the Timer register is configured as a
13-bit register. As the count rolls over from all '1s'
to all '0s,' it sets the Timer Interrupt Flag TF1. The
counted input is enabled to the Timer when TR1 =
1 and either GATE = 0 or /INT1 = 1. (Setting GATE
= 1 allows the Timer to be controlled by external in-
put /INT1, to facilitate pulse width measurements).
TR1 is a control bit in the Special Function Regis-
ter TCON (TCON Control Register). GATE is in
TMOD.
Table 38. TMOD Register (TMOD)
Table 39. Description of the TMOD Bits
50/170
Bit
7
6
5
4
3
2
1
0
Gate
7
Symbol
Gate
Gate
C/T
C/T
M1
M0
M1
M0
C/T
Timer 1
Timer 0
Timer
6
Gating control when set. Timer/Counter 1 is enabled only while INT1 pin is High and
TR1 control pin is set. When cleared, Timer 1 is enabled whenever TR1 control bit is set
Timer or Counter selector, cleared for timer operation (input from internal system clock);
set for counter operation (input from T1 input pin)
(M1,M0)=(0,0): 13-bit Timer/Counter, TH1, with TL1 as 5-bit prescaler
(M1,M0)=(0,1): 16-bit Timer/Counter. TH1 and TL1 are cascaded. There is no prescaler.
(M1,M0)=(1,0): 8-bit auto-reload Timer/Counter. TH1 holds a value which is to be
reloaded into TL1 each time it overflows
(M1,M0)=(1,1): Timer/Counter 1 stopped
Gating control when set. Timer/Counter 0 is enabled only while INT0 pin is High and
TR0 control pin is set. When cleared, Timer 0 is enabled whenever TR0 control bit is set
Timer or Counter selector, cleared for timer operation (input from internal system clock);
set for counter operation (input from T0 input pin)
(M1,M0)=(0,0): 13-bit Timer/Counter, TH0, with TL0 as 5-bit prescaler
(M1,M0)=(0,1): 16-bit Timer/Counter. TH0 and TL0 are cascaded. There is no prescaler.
(M1,M0)=(1,0): 8-bit auto-reload Timer/Counter. TH0 holds a value which is to be
reloaded into TL0 each time it overflows
(M1,M0)=(1,1): TL0 is an 8-bit Timer/Counter controlled by the standard TImer 0 control
bits. TH0 is an 8-bit timer only controlled by Timer 1 control bits
Figure 22., page 51
M1
5
M0
4
The 13-bit register consists of all 8 bits of TH1 and
the lower 5 bits of TL1. The upper 3 bits of TL1 are
indeterminate and should be ignored. Setting the
run flag does not clear the registers.
Mode 0 operation is the same for the Timer0 as for
Timer1. Substitute TR0, TF0, and /INT0 for the
corresponding
22., page
one for Timer1 and one for Timer0.
Mode 1. Mode 1 is the same as Mode 0, except
that the Timer register is being run with all 16 bits.
Gate
3
Function
51. There are two different GATE Bits,
C/T
2
Timer1
signals
M1
1
in
M0
0
Figure