UPSD3234AV-24U1T STMicroelectronics, UPSD3234AV-24U1T Datasheet - Page 7

• Manufacturer Part Number: UPSD3234AV-24U1T
• Description: Flash Programmable System Devices with 8032 Microcontroller Core and 64Kbit SRAM
• Manufacturer: STMicroelectronics

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SUMMARY DESCRIPTION
The uPSD323x Series combines a fast 8051-
based microcontroller with a flexible memory
structure, programmable logic, and a rich periph-
eral mix including USB, to form an ideal embedded
controller. At its core is an industry-standard 8032
MCU operating up to 40MHz.
A JTAG serial interface is used for In-System Pro-
gramming (ISP) in as little as 10 seconds, perfect
for manufacturing and lab development.
The USB 1.1 low-speed interface has one Control
endpoint and two Interrupt endpoints suitable for
HID class drivers.
The 8032 core is coupled to Programmable Sys-
tem Device (PSD) architecture to optimize the
8032 memory structure, offering two independent
banks of Flash memory that can be placed at vir-
tually any address within 8032 program or data ad-
dress space, and easily paged beyond 64K bytes
using on-chip programmable decode logic.
Figure 2. Block Diagram
P3.0:7
P1.0:7
P4.0:7
USB+,
USB–
Interrupts
(3) 16-bit
Counters
External
Timer/
(2)
(8) GPIO, Port 3
(8) GPIO, Port 1
(8) GPIO, Port 4
(5) 8-bit PWM
(4) 8-bit ADC
USB v1.1
UART0
UART1
I
2
C
8032
MCU
Core
uPSD3234A, uPSD3234BV, uPSD3233B, uPSD3233BV
uPSD323x
Dual Flash memory banks provide a robust solu-
tion for remote product updates in the field through
In-Application Programming (IAP). Dual Flash
banks also support EEPROM emulation, eliminat-
ing the need for external EEPROM chips.
General purpose programmable logic (PLD) is in-
cluded to build an endless variety of glue-logic,
saving external logic devices. The PLD is config-
ured using the software development tool, PSD-
soft
www.st.com/psm, at no charge.
The uPSD323x also includes supervisor functions
such as a programmable watchdog timer and low-
voltage reset.
Programmable
Programmable
16 Macrocells
Decode and
Page Logic
Watchdog and Low-Voltage Reset
Purpose
V
General
8032 Address/Data/Control Bus
Logic,
CC
, V
Express,
(80-pin device only)
DD
, GND, Reset, Crystal In
JTAG ISP
Supervisor:
128K or 256K Bytes
2nd Flash Memory:
1st Flash Memory:
(8) GPIO, Port A
(8) GPIO, Port B
(2) GPIO, Port D
(4) GPIO, Port C
(80-pin only)
32K Bytes
8K Bytes
available
SRAM:
from
the
Dedicated
PA0:7
PD1:2
PB0:7
PC0:7
AI10429
web
MCU
Bus
Pins
7/170
at