SPC8106 S-MOS Systems, SPC8106 Datasheet - Page 140

• Manufacturer Part Number: SPC8106
• Description: LCD/CRT VGA CONTROLLER
• Manufacturer: S-MOS Systems

bits 7-5
bits 2-0
bit 3
bit 2
bit 1
bit 0
bits 7-0
Hardware Functional Specification
09 Sprite Write Select Register RW
n/a
0A General Storage Register 1 RW
General
Storage Bit 7
SP1-98
Sprites 0 to 255 reside in standard VGA display memory space and should be used with caution.
S-MOS Systems, Inc. • Tel: [phone] • Fax: [phone] • http://www.smos.com
n/a
General
Storage Bit 6
Primary Revision Code Bits [2:0]
The Primary Revision Code Bits 2 to 0 are read-only bits permanently set to 1. The current revision
code of the chip is a combination of the primary and secondary revision code values. The second-
ary revision code bits are contained in register 0Fh.
Monitor ID Bits [2:0]
The Monitor ID Bits allow software to read the status on the monitor sense input pins MS[2:0].
These inputs are not latched and are expected to have external pullup resistors attached, so that if
nothing is connected to them these register bits will read 111.
Sprite Page Select
This bit is used to select the current sprite page (page 0 or 1) accessed at the A000h address seg-
ment when the sprite write mode is enabled. The mapping of the sprite pages to the Sprite Page
Select bit and the Upper Page Swap Enable bit are given in the following table:
Sprite Logical Plane Select
This bit is used in sprite write mode to select which sprite bit plane is currently being written. When
this bit is set to 1, logical bit plane 1 is selected, and when this bit is set to 0, logical bit plane 0 is
selected.
Upper Page Swap Enable
The Upper Page Swap Enable bit is used to swap access addresses for the upper and lower 256
sprites. When this bit is set to 1, the upper 256 sprites residing in the B000h address segment can
be addressed at A000h. When this bit is set to 0, the upper 256 sprites are addressed at B000h.
The recommended setting for this bit is 1 when writing sprite data.
Sprite Write Mode Enable
This bit is used to enable sprite write mode. When this bit is set to 1, the Graphics Controller write
mode logic is disabled and CPU data can be written directly to the selected sprite plane. When this
bit is set to 0, the Graphics Controller write mode logic functions normally on all CPU write data.
General Storage Bits
The General Storage Register 1 can be used to provide 8 bits of read/write temporary storage.
These bits have no effect on hardware.
Upper Page
Swap Enable
n/a
General
Storage Bit 5
0
0
1
1
Table 0-54 Sprite Page Mapping
Sprite Page
Select
n/a
General
Storage Bit 4
0
1
0
1
X12-SP-001-07
Addressable Sprites
Sprite Page
Select
General
Storage Bit 3
128 to 255
256 to 383
384 to 511
0 to 127
Sprite
Logical
Plane Sel
General
Storage Bit 2
Upper Page
Swap Enable
General
Storage Bit 1
Sprite Write
Mode Enable
General
Storage Bit 0
411-1.0
SPC8106