SPC8106 S-MOS Systems, SPC8106 Datasheet - Page 24

• Manufacturer Part Number: SPC8106
• Description: LCD/CRT VGA CONTROLLER
• Manufacturer: S-MOS Systems

Pin Mapping for Various Display Modes
Mixed Voltage Configurations
Summary of Configuration Options
These inputs have internal pullup resistors. Based on the value of the internal pull-ups, the exter-
nal pull-down resistors if necessary, should be approximately 15K ohm. This value will provide the
correct voltage levels on power-up without loading the DRAM Data lines (V
Data Sheet
DS-18
Pin Name
MD[3:0]
MD[4]
MD[5]
MD[6]
MD[7]
MD[8]
MD[12:9]
MD[13]
MD[14]
MD[15]
VSYNC#
HSYNC#
YD
LP
WF
XCSL
XCSL2
UD[3]
UD[2]
UD[1]
UD[0]
LD[3]
LD[2]
LD[1]
LD[0]
OL0
OL1
OL23
Pin Name
Core VDD
SPC8106
S-MOS Systems, Inc. • Tel: [phone] • Fax: [phone] • http://www.smos.com
3.3 V
5.0 V
value on this pin at falling edge of RESET is used to configure:
values latched into read-only Aux Reg[0C] bits 3:0 for software use
16-bit I/O interface (1) / 8-bit I/O interface (0)
A[19:2] latched internally by ALE (1) / standard ISA bus ALE - A[16:0] not latched (0)
2 CAS, 1 WE type DRAM (1) / 1 CAS, 2 WE type DRAM (0)
support 16-bit panel with external logic (1) / support 16-bit panel directly (0)
5 V core operating voltage (1) / 3.3 V core operating voltage (0)
values latched into read-only bits 7:4 of Aux Reg[0C] for software use
pins 38, 39 used for ext. RC for 32 kHz PDCLK (1) / pins 38, 39 used for OL[1:0] (0)
Internal PDCLK doubling disable (1) / enable (0)
3C3h used as video enable port (1) / 46E8h and 102h used as video enable port (0)
VSYNC# None
HSYNC# None
None
None
None
None
None
None
None
None
None
None
None
None
None
OL0
OL1
OL23
CRT
3.3 V
Display Mode
NO
OK
I/O VDD
YD
LP
WF
XCSL
XCSL2
UD[3]
UD[2]
UD[1]
UD[0]
LD[3]
LD[2]
LD[1]
LD[0]
None
None
None
5.0 V
LCD
OK
OK
None
None
VSYNC#
HSYNC#
None (forced 0) None (forced 0) DATAEN DATAEN
PCLK
None (forced 0) R[3]
None (forced 0) B[3]
None (forced 0) B[2]
None (forced 0) B[1]
None (forced 0) R[2]
D[3]
D[2]
D[1]
D[0]
None
None
None
RGBI
None
None
VSYNC#
HSYNC#
PCLK
G[3]
G[2]
G[1]
R[1]
B[0]
G[0]
R[0]
12-bit RGB
None
None
VSYNC# VSYNC#
HSYNC# HSYNC#
PANCLK PANCLK
R[2]
B[2]
B[1]
B[0]
R[1]
G[2]
G[1]
G[0]
R[0]
None
None
None
9-bit
DD
None
None
R[3]
B[3]
B[2]
B[1]
R[2]
G[3]
G[2]
G[1]
R[1]
B[0]
G[0]
R[0]
AUX[0B]b1=0
AUX[00]b5=1
12-bit
= 5.0V).
TFT
(1/0)
VSYNC#
HSYNC#
None
None
DATAEN
PANCLK
R[3]
B[3]
B[2]
B[1]
R[2]
G[3]
G[2]
G[1]
R[1]
B[0]
G[0]
R[0]
AUX[0B]b1=1
AUX[00]b5=1
411-1.0
12-bit
SPC8106