SPC8106 S-MOS Systems, SPC8106 Datasheet - Page 70
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SPC8106
Manufacturer Part Number
SPC8106
Description
LCD/CRT VGA CONTROLLER
Manufacturer
S-MOS Systems
Datasheet
1.SPC8106.pdf
(432 pages)
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7.0
Pixel Clock:
MEMEN input:
T ml = low pulse width of MEMEN
PDCLK input:
T
External RC Delay for PDCLK:
The following are tables of timing parameters and min/max values. These tables are followed by
waveforms defining these parameters.
Hardware Functional Specification
Conditions:
SP1-28
ph
T
T
p
m
CLK Signal Dependant Input Timing
T
pulse width required by the DRAM.
Propagation Delay Time
T
= high pulse width of PDCLK (for 64 kHz input)
=
ml
=
S
=
---------------- -
f
and T
------------------ -
f
PDCLK
A.C. CHARACTERISTICS
MEMEN
1
S-MOS Systems, Inc. • Tel: (408) 922-0200 • Fax: (408) 922-0238 • http://www.smos.com
-------------- - or
f
CLKI1
1
1
ph
V
T
T
C
C
r
r
DD
L
L
, T
, T
should be chosen to be as short as possible, but greater than the minimum RAS
= 100 pF (CPU, RAMDAC Interface, LCD Panel Interface)
= 20 pF (Video Memory Interface)
f
f
= 5.0 V
for all CMOS inputs must be < 5 nsec (V
for all TTL inputs must be < 5 nsec (V
-------------- -
f
CLKI2
1
10% T
a
= 0 C to 70 C
X12-SP-001-07
IN
= V
IN
= 0.1 V
ILMAX
~ V
DD
IHMIN
~ 0.9 V
)
DD
)
411-1.0
SPC8106
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