SPC8106 S-MOS Systems, SPC8106 Datasheet - Page 169

• Manufacturer Part Number: SPC8106
• Description: LCD/CRT VGA CONTROLLER
• Manufacturer: S-MOS Systems

SPC8106
Hardware Functional Specification
13.0 KNOWN LIMITATIONS
Software Power Save Modes 3 and 4
Although data writes to the internal LUT do not happen during Software Power Save Modes 3 and
4, the chip fails to prevent the latching of a write request during these Power Save Modes. The
result is that the last attempted write to the LUT during Power Save Modes 3 and 4 will be latched
and written to the LUT when the chip is returned to active state. A similar phenomenon will occur
with the external palette registers during Power Save Modes 3 and 4.
To prevent the latched data from being written to the LUT, it is recommended that the AUX[0B]
bits 6 and 7 be turned on before entering these Power Save Modes, then restoring them to 0
when leaving these modes. These bits prevent writes to the internal and external palette registers
and will prevent the latched data from being written.
411-1.0
SP1-127
S-MOS Systems, Inc. • Tel: [phone] • Fax: [phone] • http://www.smos.com
X12-SP-001-07