SPC8106 S-MOS Systems, SPC8106 Datasheet - Page 52

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SPC8106

Manufacturer Part Number
SPC8106
Description
LCD/CRT VGA CONTROLLER
Manufacturer
S-MOS Systems
Datasheet

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2.0
2.1
2.2
Hardware Functional Specification
SP1-10
low power CMOS
3.3 and 5 volt operation
144 pin QFP17 surface mount package
8- or 16-bit ISA CPU data bus interface
programmable 64x64x2-bit hardware sprite, or 64x64x2-bit hardware cursor
two 2-terminal crystal inputs for internal oscillators, maximum 28.322 MHz frequency. External crystal oscil-
lators also supported
interfaces to a single 256Kx16 DRAM (70 ns for 3.3 V I/O and Core, 80 ns for 5 V I/O and Core,
1024x256x16 or 512x512x16).
Access to full 512Kbytes of video memory allowed
selectable DRAM interface configurations: 2 CAS/1 WE, or 1 CAS/2 WE
selectable 256 cycle/4 ms or 256 cycle/32 ms DRAM refresh rate, or low power self-refresh mode (for
DRAMs supporting self-refresh)
32 kHz 50% duty cycle power down clock support during Power Save Mode 4 and Suspend mode
one hardware plus six software initiated power save modes
ability to place external RAMDAC in power save mode
low power consumption.
3C3h and 46E8h video enable registers supported
all output pins (except clock interface) can be tri-stated and driven as inputs to allow board level pin testing
FEATURES
Technology
System
S-MOS Systems, Inc. • Tel: (408) 922-0200 • Fax: (408) 922-0238 • http://www.smos.com
5 V core and I/O operation
3.3 V core and 5 V I/O operation
3.3 V core and I/O operation
X12-SP-001-07
411-1.0
SPC8106

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