SPC8106 S-MOS Systems, SPC8106 Datasheet - Page 382

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SPC8106

Manufacturer Part Number
SPC8106
Description
LCD/CRT VGA CONTROLLER
Manufacturer
S-MOS Systems
Datasheet

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2.0
2.1
The following table shows the jumper selections available for this board.
When a SPC8108 is installed, set JPI and JP2 to position 1-2. When a SPC8106 is installed, set
JPI and JP2 to position 2-3. See “SDU8106B0E Rev. 1.0 Schematic Diagrams” on page 16.
If enabled, a vertical retrace will generate an interrupt on the SPC8106F0C IRQ pin. To connect
IRQ to ISA bus IRQ9, set jumper JP3 to position 1-2; otherwise set the jumper to position 2-3.
To support 16-bit panels using an external latch, set JP4 to position 1-2 and remove the 16-pin
DIP shunt at U9. (Configuration input MD7 must also be set to the open position). When the
SPC8106 is in non-CRT mode, the SPC8106 can directly drive a 16-bit panel by setting JP4 to
position 2-3 and installing the DIP shunt at U9. (Configuration input MD7 must also be set to the
closed position).
SDU8106B
EV1-6
JP1 and JP2 Select VGA Controller Chip (socket U1)
JP3 Vertical Retrace Interrupt
JP4 Select latch for 16-bit LCD panel drive
Jumper
INSTALLATION AND CONFIGURATION
Configuration Jumpers
JP1
JP2
JP3
JP4
S-MOS Systems, Inc. • Tel: (408) 922-0200 • Fax: (408) 922-0238 • http://www.smos.com
0E
Rev. 1.0 Evaluation Board User Manual
SPC8108 setting
IRQ connected to ISA bus IRQ9
16-bit LCD interface, using external latch 16-bit LCD interface, direct from SPC8106
Table 0-1 SDU8106B0E Configuration Jumper Settings
1 - 2
X12-AN-001-01
SPC8106 setting
N/C
2 - 3
411-1.0
SPC8106

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