upd78f0730 Renesas Electronics Corporation., upd78f0730 Datasheet - Page 101

• Manufacturer Part Number: upd78f0730
• Description: 8-bit Single-chip Microcontroller
• Manufacturer: Renesas Electronics Corporation.

(4) Example of setting procedure when stopping the high-speed system clock
<2> Setting the high-speed system clock as the main system clock (MCM register)
<3> Setting the main system clock as the CPU clock and selecting the division ratio (PCC register)
The high-speed system clock can be stopped in the following two ways.
• Executing the STOP instruction to set the STOP mode
• Setting MSTOP to 1 and stopping the X1 oscillation (disabling clock input if the external clock is used)
(a) To execute a STOP instruction
<1> Setting to stop peripheral hardware
<2> Setting the X1 clock oscillation stabilization time after standby release
<3> Executing the STOP instruction
When XSEL and MCM0 are set to 1, the high-speed system clock is supplied as the main system clock
and peripheral hardware clock.
Caution If the high-speed system clock is selected as the main system clock, a clock other than
When CSS is cleared to 0, the main system clock is supplied to the CPU. To select the CPU clock
division ratio, use PCC0, PCC1, and PCC2.
XSEL
CSS
Stop peripheral hardware that cannot be used in the STOP mode (for peripheral hardware that
cannot be used in STOP mode, see CHAPTER 14 STANDBY FUNCTION).
When the CPU is operating on the X1 clock, set the value of the OSTS register before the STOP
instruction is executed.
When the STOP instruction is executed, the system is placed in the STOP mode and X1 oscillation
is stopped (the input of the external clock is disabled).
1
0
the high-speed system clock cannot be set as the peripheral hardware clock.
MCM0
PCC2
1
0
0
0
0
1
Other than above
High-speed system clock (f
Selection of Main System Clock and Clock Supplied to Peripheral Hardware
PCC1
Preliminary User’s Manual U19014EJ1V0UD
CHAPTER 5 CLOCK GENERATOR
0
0
1
1
0
Main System Clock (f
PCC0
0
1
0
1
0
XH
f
f
f
f
f
Setting prohibited
XP
XP
XP
XP
XP
XP
)
)
/2 (default)
/2
/2
/2
2
3
4
CPU Clock (f
High-speed system clock (f
Peripheral Hardware Clock (f
CPU
) Selection
XH
)
PRS
)
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