upd78f0730 Renesas Electronics Corporation., upd78f0730 Datasheet - Page 437
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upd78f0730
Manufacturer Part Number
upd78f0730
Description
8-bit Single-chip Microcontroller
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.UPD78F0730.pdf
(518 pages)
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(1) Low-voltage detection register (LVIM)
Address: FFBEH
Symbol
This register sets low-voltage detection and the operation mode.
This register can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation sets LVIM to 00H.
LVIM
Notes 1.
Caution.
LVION
LVIMD
LVIF
LVION
<7>
0
1
0
1
0
1
Notes 2, 3
Note 4
2.
3.
4.
Note 2
After reset: 00H
Bit 0 is read-only.
LVION and LVIMD are cleared to 0 in the case of a reset other than an LVI reset. These are
not cleared to 0 in the case of an LVI reset.
When LVION is set to 1, operation of the comparator in the LVI circuit is started. Use
software to wait for an operation stabilization time (10
the voltage is confirmed at LVIF.
The value of LVIF is output as the interrupt request signal INTLVI when LVION = 1 and
LVIMD = 0.
Disables operation
Enables operation
Generates interrupt signal when supply voltage (V
Generates internal reset signal when supply voltage (V
Supply voltage (V
Supply voltage (V
Figure 17-2. Format of Low-Voltage Detection Register (LVIM)
To stop LVI, follow either of the procedures below.
• When using 8-bit memory manipulation instruction: Write 00H to LVIM.
• When using 1-bit memory manipulation instruction: Clear LVIMD to 0 and then
6
0
CHAPTER 17 LOW-VOLTAGE DETECTOR
R/W
5
0
DD
DD
Preliminary User’s Manual U19014EJ1V0UD
) ≥ detection voltage (V
) < detection voltage (V
Note 1
Low-voltage detection operation mode selection
Enables low-voltage detection operation
4
0
Low-voltage detection flag
LVI
LVI
3
0
), or when operation is disabled
)
DD
) < detection voltage (V
DD
) < detection voltage (V
2
0
µ
s (MAX.)) when LVION is set to 1 until
LVIMD
clear LVION to 0.
<1>
LVI
)
LVI
LVIF
<0>
)
437
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