upd78f0730 Renesas Electronics Corporation., upd78f0730 Datasheet - Page 104

• Manufacturer Part Number: upd78f0730
• Description: 8-bit Single-chip Microcontroller
• Manufacturer: Renesas Electronics Corporation.

5.6.3 Example of controlling internal low-speed oscillation clock
driven (240 kHz (TYP.)) if the watchdog timer operation has been enabled by the option byte.
104
The internal low-speed oscillation clock cannot be used as the CPU clock.
Only the following peripheral hardware can operate with this clock.
• Watchdog timer
• 8-bit timer H1 (if f
In addition, the following operation modes can be selected by the option byte.
• Internal low-speed oscillator cannot be stopped
• Internal low-speed oscillator can be stopped by software
The internal low-speed oscillator automatically starts oscillation after a reset release, and the watchdog timer is
(1) Example of setting procedure when stopping the internal low-speed oscillation clock
(2) Example of setting procedure when restarting oscillation of the internal low-speed oscillation clock
Caution If “Internal low-speed oscillator cannot be stopped” is selected by the option byte, oscillation of
Caution Be sure to confirm that MCS = 1 or CLS = 1 when setting RSTOP to 1. In addition, stop
<1> Setting LSRSTOP to 1 (RCM register)
<1> Clearing LSRSTOP to 0 (RCM register)
(b) To stop internal high-speed oscillation clock by setting RSTOP to 1
<3> Executing the STOP instruction
<1> Confirming the CPU clock status (PCC and MCM registers)
<2> Stopping the internal high-speed oscillation clock (RCM register)
When LSRSTOP is set to 1, the internal low-speed oscillation clock is stopped.
When LSRSTOP is cleared to 0, the internal low-speed oscillation clock is restarted.
Confirm with CLS and MCS that the CPU is operating on a clock other than the internal high-speed
oscillation clock.
the internal low-speed oscillation clock cannot be controlled.
CLS
0
0
When the STOP instruction is executed, the system is placed in the STOP mode and internal high-
speed oscillation clock is stopped.
When CLS = 0 and MCS = 0, the internal high-speed oscillation clock is supplied to the CPU, so
change the CPU clock to the high-speed system clock.
When RSTOP is set to 1, internal high-speed oscillation clock is stopped.
peripheral hardware that is operating on the internal high-speed oscillation clock.
RL
, f
RL
MCS
/2
1
0
7
, or f
RL
Internal high-speed oscillation clock
High-speed system clock
/2
9
is selected as the count clock)
Preliminary User’s Manual U19014EJ1V0UD
CHAPTER 5 CLOCK GENERATOR
CPU Clock Status