upd78f0730 Renesas Electronics Corporation., upd78f0730 Datasheet - Page 413
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upd78f0730
Manufacturer Part Number
upd78f0730
Description
8-bit Single-chip Microcontroller
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.UPD78F0730.pdf
(518 pages)
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Remark f
Item
System clock
PLL
CPU
Flash memory
RAM
Regulator
Port (latch)
16-bit timer/event counter 00
8-bit timer/event
counter
8-bit timer H1
Watchdog timer
Serial interface
Power-on-clear function
Low-voltage detection function
External interrupt
Main system clock
f
RL
f
f
f
RH
X
EXCLK
RL
HALT Mode Setting
:
:
:
:
For chip
For USB
UART6
CSI10
USB
Internal high-speed oscillation clock
X1 clock
External main system clock
Internal low-speed oscillation clock
f
f
f
RH
X
EXCLK
50
51
Clock supply to the CPU is stopped
Operation continues (cannot
be stopped)
Status before HALT mode
was set is retained
Operates or stops by external clock input
Status before HALT mode was set is retained
Operable
Operation stopped
Operation stopped
Status before HALT mode was set is retained
Operable in normal operation mode.
Status before HALT mode was set is retained
Operable
Operable. Clock supply to watchdog timer stops when “internal low-speed oscillator can be
stopped by software” is set by option byte.
Operable
When CPU Is Operating on
Table 14-1. Operating Statuses in HALT Mode
Oscillation Clock (f
Internal High-Speed
When HALT Instruction Is Executed While CPU Is Operating on Main System Clock
CHAPTER 14 STANDBY FUNCTION
Preliminary User’s Manual U19014EJ1V0UD
RH
)
Status before HALT mode was set is retained
Operation continues (cannot
be stopped)
When CPU Is Operating on
X1 Clock (f
X
)
Status before HALT mode
was set is retained
Operation continues (cannot
be stopped)
External Main System Clock
When CPU Is Operating on
(f
EXCLK
)
413
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