upd78f0730 Renesas Electronics Corporation., upd78f0730 Datasheet - Page 107

• Manufacturer Part Number: upd78f0730
• Description: 8-bit Single-chip Microcontroller
• Manufacturer: Renesas Electronics Corporation.

5.6.6 CPU clock status transition diagram
When 2.7 V/1.59 V POC Mode Is Set (Option Byte: POCMODE = 1)
Figure 5-14 shows the CPU clock status transition diagram of this product.
Remark In the 2.7 V/1.59 V POC mode (option byte: POCMODE = 1), the CPU clock status changes to (A) in the
above figure when the supply voltage exceeds 2.7 V (TYP.), and to (B) after reset processing (20
(TYP.)).
Regulator: Operating in normal mode
Internal low-speed oscillator: Operable
Internal high-speed oscillator:
Selectable by CPU
X1 oscillation/EXCLK input: Operating
Regulator: Operating in normal mode
Internal low-speed oscillator: Operable
Internal high-speed oscillator: Operating
X1 oscillation/EXCLK input:
Selectable by CPU
(D)
oscillation/EXCLK
input → HALT
Figure 5-14. CPU Clock Status Transition Diagram
CPU: X1
Regulator: Operating in normal mode
Internal low-speed oscillator: Operable
Internal high-speed oscillator: Operable
X1 oscillation/EXCLK input: Operating
Preliminary User’s Manual U19014EJ1V0UD
CHAPTER 5 CLOCK GENERATOR
(A)
(B)
with X1 oscillation or
Reset release
with internal high-
(C)
speed oscillation
CPU: Operating
CPU: Operating
Power ON
EXCLK input
Regulator: Woken up
Internal low-speed oscillator: Woken up
Internal high-speed oscillator: Woken up
X1 oscillation/EXCLK input: Stops (I/O port mode)
Regulator: Operating in normal mode
Internal low-speed oscillator: Operating
Internal high-speed oscillator: Operating
X1 oscillation/EXCLK input: Stops (I/O port mode)
(E)
oscillation/EXCLK
input → STOP
V
V
V
CPU: X1
DD
DD
DD
< 2.7 V (MIN.)
≥ 2.7 V (MIN.)
≥ 1.8 V (MIN.)
Regulator: Operating in low
Internal low-speed oscillator: Operable
Internal high-speed oscillator: Stops
X1 oscillation/EXCLK input: Stops
operating current mode
107
µ
s