upd78f0730 Renesas Electronics Corporation., upd78f0730 Datasheet - Page 88
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upd78f0730
Manufacturer Part Number
upd78f0730
Description
8-bit Single-chip Microcontroller
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.UPD78F0730.pdf
(518 pages)
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(4) Main OSC control register (MOC)
88
This register selects the operation mode of the high-speed system clock.
This register is used to stop the X1 oscillator or to disable an external clock input from the EXCLK pin when the
CPU operates with a clock other than the high-speed system clock.
MOC can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation sets this register to 80H.
Address: FFA2H
Symbol
MOC
Cautions 1. When setting MSTOP to 1, be sure to confirm that the CPU operates with a clock
MSTOP
MSTOP
<7>
0
1
After reset: 80H
2. Do not clear MSTOP to 0 while bit 6 (OSCSEL) of the clock operation mode select
3. The peripheral hardware cannot operate when the peripheral hardware clock is
Figure 5-5. Format of Main OSC Control Register (MOC)
X1 oscillator operating
X1 oscillator stopped
other than the high-speed system clock. Specifically, set MSTOP to 1 under the
following condition.
• When MCS = 0 (when CPU operates with the internal high-speed oscillation
clock)
register (OSCCTL) is 0 (I/O port mode).
stopped.
peripheral hardware clock has been stopped, initialize the peripheral hardware.
6
0
R/W
X1 oscillation mode
Preliminary User’s Manual U19014EJ1V0UD
CHAPTER 5 CLOCK GENERATOR
To resume the operation of the peripheral hardware after the
5
0
Control of high-speed system clock operation
4
0
3
0
External clock from EXCLK pin is enabled
External clock from EXCLK pin is disabled
External clock input mode
2
0
1
0
0
0
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