upd78f0730 Renesas Electronics Corporation., upd78f0730 Datasheet - Page 232

• Manufacturer Part Number: upd78f0730
• Description: 8-bit Single-chip Microcontroller
• Manufacturer: Renesas Electronics Corporation.

(5) Baud rate generator control register 6 (BRGC6)
232
Address: FF57H After reset: FFH R/W
BRGC6
Cautions 1. Make sure that bit 6 (TXE6) and bit 5 (RXE6) of the ASIM6 register = 0 when rewriting the
Remarks 1. f
Symbol
This register sets the division value of the 8-bit counter of serial interface UART6.
BRGC6 can be set by an 8-bit memory manipulation instruction.
Reset signal generation sets this register to FFH.
Remark BRGC6 can be refreshed (the same value is written) by software during a communication operation
2. The baud rate is the output clock of the 8-bit counter divided by 2.
2. k: Value set by MDL67 to MDL60 bits (k = 4, 5, 6, ..., 255)
3. ×: Don’t care
MDL67
MDL67
(when bit 7 (POWER6) and bit 6 (TXE6) of ASIM6 = 1 or bit 7 (POWER6) and bit 5 (RXE6) of ASIM6
= 1).
7
0
0
0
0
1
1
1
1
•
•
•
•
•
MDL67 to MDL60 bits.
XCLK6
Figure 10-6. Format of Baud Rate Generator Control Register 6 (BRGC6)
MDL66
MDL66
: Frequency of base clock selected by the TPS63 to TPS60 bits of CKSR6 register
6
0
0
0
0
•
•
•
•
•
1
1
1
1
MDL65
MDL65
5
0
0
0
0
1
1
1
1
•
•
•
•
•
CHAPTER 10 SERIAL INTERFACE UART6
MDL64
MDL64
Preliminary User’s Manual U19014EJ1V0UD
4
0
0
0
0
1
1
1
1
•
•
•
•
•
MDL63
MDL63
3
0
0
0
0
•
•
•
•
•
1
1
1
1
MDL62
MDL62
2
0
1
1
1
•
•
•
•
•
1
1
1
1
MDL61
MDL61
1
×
0
0
1
0
0
1
1
•
•
•
•
•
MDL60
MDL60
0
×
0
1
0
•
•
•
•
•
0
1
0
1
252
253
254
255
k
×
4
5
6
•
•
•
•
•
Setting prohibited
f
f
f
f
f
f
f
XCLK6
XCLK6
XCLK6
XCLK6
XCLK6
XCLK6
XCLK6
Output clock selection of
/4
/5
/6
/252
/253
/254
/255
8-bit counter
•
•
•
•
•