upd78f0730 Renesas Electronics Corporation., upd78f0730 Datasheet - Page 420
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upd78f0730
Manufacturer Part Number
upd78f0730
Description
8-bit Single-chip Microcontroller
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.UPD78F0730.pdf
(518 pages)
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(b) Release by reset signal generation
When the reset signal is generated, STOP mode is released, and then, as in the case with a normal reset
operation, the program is executed after branching to the reset vector address.
Remark f
Internal high-speed
(X1 oscillation)
Status of CPU
oscillation clock
system clock
Reset signal
Status of CPU
High-speed
Reset signal
×: don’t care
Maskable interrupt
request
Reset
X
Table 14-4. Operation in Response to Interrupt Request in STOP Mode
: X1 clock oscillation frequency
(2) When internal high-speed oscillation clock is used as CPU clock
Release Source
(1) When high-speed system clock is used as CPU clock
Normal operation
(internal high-speed
system clock)
Oscillates
Normal operation
(high-speed
oscillation clock)
Oscillates
Figure 14-7. STOP Mode Release by Reset
instruction
CHAPTER 14 STANDBY FUNCTION
Preliminary User’s Manual U19014EJ1V0UD
STOP
instruction
STOP
MK××
Oscillation stopped
0
0
0
0
0
1
−
Oscillation stopped
STOP mode
STOP mode
PR××
0
0
1
1
1
×
−
IE
Oscillation
0
1
0
×
1
×
×
Starting X1 oscillation is
stopped
period
Reset
specified by software.
Oscillation
stopped
period
Reset
Wait for oscillation
ISP
(20 s (TYP.))
processing
Oscillation
×
×
1
0
1
×
×
stabilization
stopped
Reset
µ
(20 s (TYP.))
processing
accuracy
Reset
µ
Next address
instruction execution
Interrupt servicing
execution
Next address
instruction execution
Interrupt servicing
execution
STOP mode held
Reset processing
Oscillation stabilization time
(internal high-speed
Normal operation
oscillation clock)
(internal high-speed
Operation
Normal operation
Oscillates
oscillation clock)
(2
Oscillates
11
/f
X
to 2
16
/f
X
)
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