upd78f0730 Renesas Electronics Corporation., upd78f0730 Datasheet - Page 109
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upd78f0730
Manufacturer Part Number
upd78f0730
Description
8-bit Single-chip Microcontroller
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.UPD78F0730.pdf
(518 pages)
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(3) CPU clock changing from internal high-speed oscillation clock (B) to high-speed system clock (C)
Note The value of this flag can be changed only once after a reset release. This setting is not necessary if it has
Cautions 1. Set the clock after the supply voltage has reached the operable voltage of the clock to be set (see
clock (B)
Remarks 1.
Status Transition
(B) → (C) (X1 clock: f
(B) → (C) (external main clock: f
(B) → (C) (X1 clock: 10 MHz < f
(B) → (C) (external main clock: 10 MHz < f
already been set.
2. CPU clock cannot changes from high-speed system clock (C) to internal high-speed oscillation
CHAPTER 22 ELECTRICAL SPECIFICATIONS (TARGET)).
2.
(Setting sequence of SFR registers)
MSTOP:
XSEL, MCM0:
RSTS, RSTOP: Bits 7 and 0 of the internal oscillation mode register (RCM)
(A) to (E) in Table 5-4 correspond to (A) to (E) in Figure 5-14.
EXCLK, OSCSEL, AMPH:
Table 5-4. CPU Clock Transition and SFR Register Setting Examples (2/3)
XH
Setting Flag of SFR Register
≤ 10 MHz)
XH
XH
)
≤ 10 MHz)
Bit 7 of the main OSC control register (MOC)
Bits 7, 6 and 0 of the clock operation mode select register (OSCCTL)
Bits 2 and 0 of the main clock mode register (MCM)
XH
)
Preliminary User’s Manual U19014EJ1V0UD
CHAPTER 5 CLOCK GENERATOR
AMPH
Unnecessary if these registers
0
0
1
1
Note
are already set
EXCLK
0
1
0
1
OSCSEL
1
1
1
1
MSTOP
with the high-speed
Unnecessary if the
CPU is operating
0
0
0
0
system clock
Must not be
Must not be
checked
checked
Must be
Must be
Register
checked
checked
OSTC
XSEL
1
1
1
1
Note
MCM0
1
1
1
1
109
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