upd78f0730 Renesas Electronics Corporation., upd78f0730 Datasheet - Page 351

• Manufacturer Part Number: upd78f0730
• Description: 8-bit Single-chip Microcontroller
• Manufacturer: Renesas Electronics Corporation.

12.5 STALL Handshake or No Handshake
Control transfer/
bulk transfer
Control transfer
(SETUP stage)
Control transfer
(data stage)
Control transfer
(status stage)
Bulk transfer
Control transfer/
bulk transfer
Errors of USBF are defined to be handled as follows.
Notes 1. A STALL response is made to re-transfer by the host.
Cautions 1. It is judged by the Alternative Setting number currently set whether the target endpoint is
Transfer Type
2. An ACK response is made if the transfer data is of less than MaxPacketSize and the data received in the
3. If an OUT transaction indicating a change from the data stage to the status stage is received during
2. For the response to the request included in control transfer to/from Endpoint0, see 12.3
status stage is discarded. If MaxPacketSize is exceeded, no response is made, the SNDSTL bit of the
UF0SDS register is set to 1, and the received data is discarded.
control transfer, an error is not handled and it is assumed that reception has been correctly completed.
valid or invalid.
Requests.
IN/OUT/SETUP
OUT/SETUP
OUT
SETUP
OUT
OUT
OUT
IN
Transaction
CHAPTER 12 USB FUNCTION CONTROLLER (USBF)
Token
Data
Data
Data
Data
Data
Data
Handshake
Packet
Target
Preliminary User’s Manual U19014EJ1V0UD
Endpoint not supported
Endpoint transfer
direction mismatch
CRC error
Bit stuffing error
Timeout
PID check error
Unsupported PID
(other than Data PID)
CRC error
Bit stuffing error
Data PID mismatch
Overrun
Overrun
Overrun
Overrun
PID check error
Unsupported PID
(other than ACK PID)
Timeout
Error Type
No response
No response
No response
No response
No response
No response
No response
No response
No response
ACK
No response
No response
ACK or
no response
No response
Response
Function
−
−
−
Note 2
Note 1
Note 1
None
None
None
None
None
None
None
Discard received data
Discard received data
Discard received data
Discard received data
Set SNDSTL bit of
UF0SDS register to 1 and
discard received data
Set SNDSTL bit of
UF0SDS register to 1 and
discard received data
Set EnHALT bit of
UF0EnSL register (n = 0 to
2) to 1
Hold transferred data and
re-transfer data
Hold transferred data and
re-transfer data
Hold transferred data and
re-transfer data
Processing
Note 3
Note 3
Note 3
351