upd78f0730 Renesas Electronics Corporation., upd78f0730 Datasheet - Page 339
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upd78f0730
Manufacturer Part Number
upd78f0730
Description
8-bit Single-chip Microcontroller
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.UPD78F0730.pdf
(518 pages)
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(4) UF0 EP2 status register L (UF0E2SL)
UF0E2SL
Bit position
This register stores the value that is to be returned in response to the GET_STATUS Endpoint2 request.
This register can be read or written in 8-bit units. Note, however, that data can be written to this register only
when the EP0NKA bit is set to 1.
If an error occurs in Endpoint2, the E2HALT bit is set to 1. A write access to this register is ignored while a
USB-side access to Endpoint2 is being received.
The hardware automatically transmits the contents of this register to the host when it has received the
GET_STATUS Endpoint2 request. If Endpoint2 has stalled, the UF0BO1 register is cleared and the BKO1NK
bit is cleared to 0.
Because writing this register is always masked when transfer to Endpoint2, rather than control transfer, is
executed, be sure to check this register to see if data has been correctly written to it.
Caution To rewrite this register, set the EP0NKA bit to 1 before reading the register contents, and
0
0
7
rewrite the register contents after confirming that the bit has been set, in order to prevent
conflict between a read access and a write access.
E2HALT
Bit name
6
0
CHAPTER 12 USB FUNCTION CONTROLLER (USBF)
This bit indicates the status of Endpoint2.
This bit is set to 1 by hardware when the SET_FEATURE Endpoint2 request has been
received. It is cleared to 0 by hardware when the CLEAR_FEATURE Endpoint2 request,
SET_CONFIGURATION request, or the SET_INTERFACE request for the Interface to
which Endpoint2 is linked has correctly been received. DATA PID is initialized to DATA0.
5
0
1: Stalled
0: Not stalled
Preliminary User’s Manual U19014EJ1V0UD
4
0
3
0
2
0
Function
1
0
E2HALT
0
Address
FF9EH
After reset
00H
339
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