upd78f0730 Renesas Electronics Corporation., upd78f0730 Datasheet - Page 460

• Manufacturer Part Number: upd78f0730
• Description: 8-bit Single-chip Microcontroller
• Manufacturer: Renesas Electronics Corporation.

19.6.3 RESET pin
the reset signal generator on the board, signal collision takes place. To prevent this collision, isolate the connection
with the reset signal generator.
memory will not be correctly programmed. Do not input any signal other than the reset signal of the dedicated flash
memory programmer.
19.6.4 Port pins
same status as that immediately after reset. If external devices connected to the ports do not recognize the port
status immediately after reset, the port pin must be connected to V
19.6.5 REGC pin
19.6.6 Other signal pins
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If the reset signal of the dedicated flash memory programmer is connected to the RESET pin that is connected to
If the reset signal is input from the user system while the flash memory programming mode is set, the flash
When the flash memory programming mode is set, all the pins not used for flash memory programming enter the
Connect the REGC pin to GND via a capacitor (0.47
Connect X1 and X2 in the same status as in the normal operation mode when using the on-board clock.
To input the operating clock from the dedicated flash memory programmer, however, connect as follows.
Cautions 1. Only the internal high-speed oscillation clock (f
• PG-FP4, FL-PR4:
• PG-FPL3, FP-LITE3:
2. Only the X1 clock (f
3. When writing the flash memory with a flash memory programmer, connect P31/INTP2/OCD1A
and P121/X1/OCD0A as follows.
The above connection is not necessary when writing the flash memory by means of self
programming.
• P31/INTP2/OCD1A: Connect to EV
• P121/X1/OCD0A:
µ
PD78F0730
RESET
In the flash memory programming mode, the signal output by the reset
signal generator collides with the signal output by the dedicated flash
programmer. Therefore, isolate the signal of the reset signal generator.
Connect CLK of the programmer to EXCLK/X2/P122.
Connect CLK of the programmer and X1/P121, and connect its inverted signal to
X2/EXCLK/P122.
Figure 19-11. Signal Collision (RESET Pin)
X
) or external main system clock (f
Signal collision
recommended) (in the input mode) or leave it open (in the output mode).
When using this pin as a port, connect it to V
Preliminary User’s Manual U19014EJ1V0UD
CHAPTER 19 FLASH MEMORY
µ
SS
Reset signal generator
F: target) in the same manner as during normal operation.
Dedicated flash programmer
connection signal
via a resistor (10 kΩ: recommended).
Output pin
DD
RH
or V
) can be used when CSI10 is used.
SS
EXCLK
via a resistor.
) can be used when UART6 is used.
SS
via a resistor (10 kΩ: