upd78f0730 Renesas Electronics Corporation., upd78f0730 Datasheet - Page 156

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upd78f0730

Manufacturer Part Number
upd78f0730
Description
8-bit Single-chip Microcontroller
Manufacturer
Renesas Electronics Corporation.
Datasheet

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6.4.6 PPG output operation
(Programmable Pulse Generator) signal during a cycle set by CR000 when bits 3 and 2 (TMC003 and TMC002) of 16-
bit timer mode control register 00 (TMC00) are set to 11 (clear & start upon a match between TM00 and CR000).
156
A square wave having a pulse width set in advance by CR010 is output from the TO00 pin as a PPG
The pulse cycle and duty factor of the pulse generated as the PPG output are as follows.
• Pulse cycle = (Set value of CR000 + 1) × Count clock cycle
• Duty = (Set value of CR010 + 1) / (Set value of CR000 + 1)
Caution To change the duty factor (value of CR010) during operation, see 6.5.1 Rewriting CR010 during
Remarks 1. For the setting of I/O pins, see 6.3 (6) Port mode register 0 (PM0).
Count clock
TM00 operation.
2. For how to enable the INTTM000 signal interrupt, see CHAPTER 13 INTERRUPT FUNCTIONS.
TMC003, TMC002
Operable bits
Figure 6-40. Block Diagram of PPG Output Operation
CHAPTER 6 16-BIT TIMER/EVENT COUNTER 00
Preliminary User’s Manual U19014EJ1V0UD
Compare register
Timer counter
Match signal
(CR010)
(TM00)
Compare register
Clear
(CR000)
Match signal
controller
Output
Interrupt signal
(INTTM000)
Interrupt signal
(INTTM010)
TO00 pin

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