cs5535 National Semiconductor Corporation, cs5535 Datasheet - Page 12

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cs5535

Manufacturer Part Number
cs5535
Description
Geode Cs5535 Companion Multi-function South Bridge
Manufacturer
National Semiconductor Corporation
Datasheet

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1.0
The Geode™ CS5535 provides interfaces for all the com-
mon peripherals of an information appliance, plus offers
expansion for additional needs, if required. Featuring a
33/66 MHz PCI interface to the GX2, the I/O companion is
internally connected using the GeodeLink™ packet archi-
tecture. This architecture supports multiple simultaneous
transactions and is totally transparent to all application soft-
ware. GeodeLink architecture related operations are man-
aged via Model Specific Registers (MSRs) that are detailed
in Section 3.1.6 "Address Spaces and MSRs" on page 52.
As shown in Figure 1-1, the CS5535 is implemented with
one GeodeLink Interface Unit (GLIU) that connects to the:
• GeodeLink PCI South Bridge
• GeodeLink Control Processor
• ATA-5 Controller (IDE Controller multiplexed with Flash
Ports 1-1 & 1-2
Ports 2-1 & 2-2
System Power
External USB
External USB
Interface)
Test/Reset
IDE/Flash
Interface
Voltages
External
External
Architecture Overview
Audio
Detect (LVD)
Low Voltage
GeodeLink™ Control
Processor (GLCP)
USB Controller #1
USB Controller #2
ATA-5 Controller
AC97 Controller
(USBC1)
(USBC2)
(ATAC)
(ACC)
Figure 1-1. Internal Block Diagram
Power Good
for Power On
Reset (POR)
12
• Universal Serial Bus 1 Controller with Ports 1-1 and 1-2
• Universal Serial Bus 2 Controller with Ports 2-1 and 2-2
• Audio Codec 97 (AC97) Controller
• Diverse Device
Power Management Controller (PMC)The Low Voltage
Detect (LVD) circuit is not a GeodeLink Device (GLD) but is
connected to the Power Management Controller for voltage
monitoring support.
GeodeLink™
— Legacy DMA, Timer, and Interrupt (82xx PC Legacy)
— UARTs (2) and IR (1) Port (shared with UART1)
— System Management Bus (SMB) Controller
— Low Pin Count (LPC) Controller
— General Purpose I/O (GPIO) with Input Conditioning
— Multi-Function General Purpose Timers (MFGPTs)
— Flash Interface (multiplexed with IDE interface)
— Real-Time Clock (RTC) with CMOS RAM
Interface
(GLIU)
Unit
Functions (ICF)
CMOS RAM
Device (DD)
Interface
82xx PC
Legacy
RTC &
Flash
Diverse
Diverse Integration Logic (DIVIL)
Geode™ GX2 Interface
33 or 66 MHz
GeodeLink™ PCI
South Bridge
(GLPCI_SB)
Controller
UART (2)
& IR (1)
Mgmnt
Timers
Power
MFGP
GPIO
SMB
LPC
Port
PCI
Revision 0.8

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