cs5535 National Semiconductor Corporation, cs5535 Datasheet - Page 303
cs5535
Manufacturer Part Number
cs5535
Description
Geode Cs5535 Companion Multi-function South Bridge
Manufacturer
National Semiconductor Corporation
Datasheet
1.CS5535.pdf
(555 pages)
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Revision 0.8
DIVIL Register Descriptions
5.6.1.4
MSR Address
Type
Reset Value
The flags are set by internal conditions. The internal conditions are enabled if the EN bit is 1. Reading the FLAG bit returns
the value; writing 1 clears the flag; writing 0 has no effect. (See Section 3.8.4 "MSR Address 3: Error Control" on page 71
for further on ERR generation details.)
63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
63:55
Bit
Bit
54
3
2
1
0
GeodeLink Device Error MSR (DIVIL_GLD_MSR_ERROR)
Name
PIC_ASMI_EN
KEL_EE_ASMI_
EN
SHTDWN_ASMI_
EN
HLT_ASMI_EN
Name
RSVD
UART1XUART2_
ERR_FLAG
RSVD
51400003h
R/W
00000000_00000000h
RSVD
DIVIL_GLD_MSR_SMI Bit Descriptions (Continued)
Description
PIC ASMI Enable. Write 1 to enable PIC_ASMI_FLAG (bit 35) and to allow the
Extended PIC Mapper to generate an ASMI.
KEL Emulation Event ASMI Enable. Write 1 to enable KEL_EE_ASMI_FLAG (bit 34)
and to allow the KEL to generate an ASMI.
Shutdown ASMI Enable. Write 1 to enable SHTDWN_ASMI_FLAG (bit 33) and to
allow a Shutdown special cycle to generate an ASMI.
Halt ASMI Enable. Write 1 to enable HLT_ASMI_FLAG (bit 32) and to allow a Halt spe-
cial cycle to generate an ASMI.
Description
Reserved. Reads return 0. Writes have no effect.
UART1 and UART2 Error Flag. If high, records that an ERR was generated due to a
collision between the two UARTs. UART1 and UART2 are set to the same I/O address
base. No chip selects are asserted and DECODE_ERR_FLAG (bit 33) is asserted.
DECODE_ERR_EN (bit 1) must be high to generate ERR and set flag. Write 1 to clear;
writing 0 has no effect.
DIVIL_GLD_MSR_ERROR Bit Descriptions
DIVIL_GLD_MSR_ERROR Register Map
(Continued)
RSVD
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8
RSVD
RSVD
7
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