cs5535 National Semiconductor Corporation, cs5535 Datasheet - Page 258

• Manufacturer Part Number: cs5535
• Description: Geode Cs5535 Companion Multi-function South Bridge
• Manufacturer: National Semiconductor Corporation

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ATAC Register Descriptions
5.4.2.5
MSR Address
Type
Reset Value
Refer to Section 5.4.2.3 "Channel 0 Drive 0 PIO (ATAC_CH0D0_PIO)" on page 255 for bit descriptions.
5.4.2.6
MSR Address
Type
Reset Value
Refer to Section 5.4.2.4 "Channel 0 Drive 0 DMA (ATAC_CH0D0_DMA)" on page 256 for bit descriptions.
5.4.2.7
MSR Address
Type
Reset Value
5.4.3
5.4.3.1
ATAC I/O Address 00h
Type
Reset Value
63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
63:0
Bit
Bit
7:4
2:1
3
7
ATAC Native Registers
Channel 0 Drive 1 PIO (ATAC_CH0D1_PIO)
Channel 0 Drive 1 DMA (ATAC_CH0D1_DMA)
PCI Abort Error (ATAC_PCI_ABRTERR)
Bus Master 0 Command - Primary (ATAC_BM0_CMD_PRIM)
Name
RSVD/PCI_ABORT
Name
RSVD
RWCTL
RSVD
51300022h
R/W
00000000_00009172h
51300023h
R/W
00000000_00077771h
51300024h
R/W
00000000_00000000h
R/W
00h
6
RSVD
Description
Reserved. Set to 0. Return 0 on read.
Read or Write Control. Sets the direction of bus master transfers.
0: PCI reads performed.
1: PCI writes performed.
This bit should not be changed when the bus master is active.
Reserved. Set to 0. Return 0 on read.
Description
Reserved. Return 0 on read.
PCI Abort. Write (of any value) to this register will set bit 1 of Bus Master 0 Status
Register.
ATAC_BM0_CMD_PRIM Bit Descriptions
5
ATAC_PCI_ABRTERR Bit Descriptions
ATAC_BM0_CMD_PRIM Register Map
ATAC_PCI_ABRTERR Register Map
(Continued)
Read: RSVD; Write: PCI_ABORT
Read: RSVD; Write: PCI_ABORT
4
258
RWCTL
3
2
9
8
RSVD
7
6
1
5
4
3
BMCTL
2
Revision 0.8
0
1
0