cs5535 National Semiconductor Corporation, cs5535 Datasheet - Page 40

• Manufacturer Part Number: cs5535
• Description: Geode Cs5535 Companion Multi-function South Bridge
• Manufacturer: National Semiconductor Corporation

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Signal Definitions
2.2.6
Note 1. All the LPC signals, except the LPC_CLK (LPC Clock) are shared on GPIO balls (see Table 2-8 "GPIO Options"
Signal Name
LPC_CLK
LPCAD[3:0]
LPC_DRQ#
LPC_SERIRQ
LPC_FRAME#
Low Pin Count (LPC) Interface (Note 1)
on page 42). The CS5535 powers up with this group of balls set to the LPC mode; in order to use them as GPIOs
they must be explicitly reprogrammed. The LPC may be switched to GPIO use via the Ball Opt MSR (see Table 2-
6 "DIVIL_BALL_OPT" on page 29).
Use RESET_OUT# for LPC reset.
Use any GPIO assigned as a PME for the LPC PME.
Use any GPIO assigned as an SMI for the LPC SMI.
Use general Sleep and Standby controls (SLEEP_X, ball C2 and SLEEP_Y, ball J3) in place of LPCPD# for LPC
power-down.
K1, J1, J2,
Ball No.
(Continued)
H1
H2
G1
G2
H3
Type
I/O
I/O
O
I
I
Description
LPC Clock. 33 MHz LPC bus shift clock.
LPC Address/Data Bus. This is the 4-bit LPC bus. Address, control,
and data are transferred on this bus between the CS5535 and LPC
devices.
An external pull-up of 100 kΩ is required on these balls if is used in
LPC mode to maintain a high level when the signals are in TRI-
STATE. From reset, these signals are not driven.
LPC_AD3 is shared with GPIO19.
LPC_AD2 is shared with GPIO18.
LPC_AD1 is shared with GPIO17.
LPC_AD0 is shared with GPIO16.
See Table 2-8 "GPIO Options" on page 42 for further details.
LPC DMA Request. This is the LPC DMA request signal. Peripherals
requiring service pull it low and then place a serially-encoded
requested channel number on this line to initiate a DMA transfer.
If the device wakes up from Sleep, at least six LPC_CLKs must occur
before this input is asserted.
Shared with GPIO20. See Table 2-8 "GPIO Options" on page 42. Tie
high if selected as LPC_DRQ# but not used.
LPC Encoded IRQ. This is the LPC serial interrupt request line, used
to report ISA-style interrupt requests. It may be activated by either the
CS5535 or an LPC peripheral.
An external pull-up of 100 kΩ is required if this ball is used in LPC
mode to maintain a high level when the signal is in TRI-STATE. From
reset, this signal is not driven.
If the device wakes up from Sleep, at least six LPC_CLKs must occur
before this input is asserted if operating in Quiet mode.
Shared with GPIO21. See Table 2-8 "GPIO Options" on page 42.
LPC Frame. This signal provides the active-low LPC FRAME signal
used to start and stop transfers on the LPC bus.
Shared with GPIO22. See Table 2-8 "GPIO Options" on page 42.
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