cs5535 National Semiconductor Corporation, cs5535 Datasheet - Page 331

• Manufacturer Part Number: cs5535
• Description: Geode Cs5535 Companion Multi-function South Bridge
• Manufacturer: National Semiconductor Corporation

Revision 0.8
5.9
The registers for the Programmable Interrupt Controller
(PIC) are divided into three sets:
• Standard GeodeLink Device MSRs (Shared with DIVIL,
• PIC Specific MSRs
• PIC Native Registers
The MSRs are accessed via the RDMSR and WRMSR pro-
cessor instructions. The MSR address is derived from the
perspective of the CPU Core. See Section 3.2 "CS5535
MSR Addressing" on page 53 for more details on MSR
addressing.
All MSRs are 64 bits, however, the PIC Specific MSRs are
called out as 32 and 8 bits. The PIC treats writes to the
MSR Address
see Section 5.6.1 on page 299.)
51400020h
51400021h
51400022h
51400023h
51400024h
51400025h
51400026h
51400027h
51400034h
PROGRAMMABLE INTERRUPT CONTROLLER REGISTER DESCRIPTIONS
PIC I/O
Offset
0Ch
1Ch
00h
04h
08h
10h
14h
18h
---
Type
R/W
R/W
R/W
R/W
R/W
R/W
RO
RO
RO
Table 5-22. PIC Specific MSRs Summary
Register Name
IRQ Mapper Unrestricted Y Select Low
(PIC_YSEL_LOW)
IRQ Mapper Unrestricted Y Select High
(PIC_YSEL_HIGH)
IRQ Mapper Unrestricted Z Select Low
(PIC_ZSEL_LOW)
IRQ Mapper Unrestricted Z Select High
(PIC_ZSEL_HIGH)
IRQ Mapper Primary Mask (PIC_IRQM_PRIM)
IRQ Mapper LPC Mask (PIC_IRQM_LPC)
IRQ Mapper Extended Interrupt Request Status
Low (PIC_XIRR_STS_LOW)
IRQ Mapper Extended Interrupt Request Status
High (PIC_XIRR_STS_HIGH)
PIC Shadow (PIC_SHDW)
331
upper 32/56 bits (i.e., bits [63:32/63:8]) of the 64-bit MSRs
as don’t cares and always returns 0 on these bits.
The PIC Specific MSRs are also accessible in I/O space
via MSR_LBAR_IRQ (MSR 51400008h), except for
MSR_PIC_SHDW (MSR 51400034h). See Section 5.6.2.1
"Local BAR - IRQ Mapper (DIVIL_LBAR_IRQ)" on page
307.
The Native registers associated with the PIC are summa-
rized in Table 5-23 on page 332 and are accessed as I/O
Addresses.
The reference column in the summary tables point to the
page where the register maps and bit descriptions are
listed.
Reset Value
0000FFFFh
00000000h
00000000h
00000000h
00000000h
00000000h
xxxxxxxxh
xxxxxxxxh
xxh
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