cs5535 National Semiconductor Corporation, cs5535 Datasheet - Page 353
cs5535
Manufacturer Part Number
cs5535
Description
Geode Cs5535 Companion Multi-function South Bridge
Manufacturer
National Semiconductor Corporation
Datasheet
1.CS5535.pdf
(555 pages)
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Revision 0.8
5.11 SYSTEM MANAGEMENT BUS REGISTER DESCRIPTIONS
The registers for the System Management Bus (SMB) are
divided into two sets:
• Standard GeodeLink Device MSRs (Shared with DIVIL,
• SMB Native Registers
The MSRs are accessed via the RDMSR and WRMSR pro-
cessor instructions. The MSR address is derived from the
perspective of the CPU Core. See Section 3.2 "CS5535
MSR Addressing" on page 53 for more details on MSR
addressing.
see Section 5.6.1 on page 299.)
SMB I/O
Offset
00h
01h
02h
03h
04h
05h
06h
07h
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Width
(Bits)
8
8
8
8
8
8
8
8
Table 5-27. SMB Native Registers Summary
Register Name
SMB Serial Data (SMB_SDA)
SMB Status (SMB_STS)
SMB Control Status (SMB_CTRL_STS)
SMB Control 1 (SMB_CTRL1)
SMB Address (SMB_ADDR)
SMB Control 2 (SMB_CTRL2)
SMB Control 3 (SMB_CTRL3)
SMB Reserved Register (SMBRSVD).
Writes are “don't care” and reads return
undefined value.
353
The Native registers (summarized in Table 5-27) are
accessed via Base Address Register MSR_LBAR_SMB
(MSR 5140000Bh) as I/O Offsets. (See Section 5.6.2.4 on
page 309 for bit descriptions of the Base Address Regis-
ter.) The reference column in the summary table points to
the page where the register maps and bit descriptions are
listed.
Reset Value
00h
00h
10h
00h
00h
00h
00h
xxh
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