pnx1700 NXP Semiconductors, pnx1700 Datasheet - Page 140

• Manufacturer Part Number: pnx1700
• Description: Connected Media Processor
• Manufacturer: NXP Semiconductors

Philips Semiconductors
Volume 1 of 1
11. MMIO Memory MAP
Table 11: MMIO Memory MAP
PNX17XX_SER_1
Preliminary data sheet
address offset
from
MMIO_BASE
(PCI base 14)
0x04,0000
0x04,5000
0x04,7000
0x04,F000
0x06,0000
0x06,1000
0x06,3000
0x06,4000
0x06,5000
0x07,0000
0x07,1000
0x07,2000
0x07,3000
0x07,5000
0x10,0000
0x10,3000
Module
Name
PCI/XIO
IIC
CLOCK
2D DE
RESET
TMDBG
GLOBAL
ARBITER
DDR Ctrl
FGPI
FGPO
LAN100
LCD Ctrl
VLD
TM5250
DCS Bus Ctrl
Each module has an address range in the MMIO aperture from which its registers
can be accessed. This address range is defined by its starting address, a.k.a. its
offset, and the aperture size defined in the MODULE_ID MMIO register. The following
table gives the offset position for each module of the PNX17xx Series system. Each
module specification contains the internal registers location within its aperture.
Therefore the physical address of each MMIO register in the system is defined by the
equation:
•
Module
ID
0xA051
0x0105
0xA063
0x0117
0xA064
0x0127
0x0126
0x1010
0x2031
0x014B
0x014C 0x0
0x3902
0xA050
0x014D 0x0
0x2B90
0xA049
MMIO_BASE + Module Offset + Register Offset.
Major
Module
Revision
0x0
0x0
0x0
0x2
0x0
0x0
0x8
0x0
0x1
0x0
0x1
0x0
0x0
0x0
Rev. 1 — 17 March 2006
Minor
Module
Revision
0x3
0x3
0x0
0x0
0x1
0x0
0x1
0x0
0x1
0x1
0x2
0x1
0x0
0x0
0x0
0x0
MMIO
size
0x00
0x00
0x00
0x10
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x01
0x00
Summary
PCI and XIO (Flash, 68k, IDE) status/control
PNX17xx Series Modules Clock Control & Status
2D Drawing Engine, includes RAM area
Endian Mode control, system & peripheral reset
control/status, watchdog
TM software debug through JTAG
Global MMIO registers controlling miscellaneous
settings, input & output router settings.
Arbiter
Main Memory Interface
Fast Generic Parallel Input
Fast Generic Parallel Output
10/100 LAN Controller
LCD Controller
Variable Length Decoder
TM5250 CPU control/status registers
MMIO bus Controller
I
2
C for boot & devices up to 400 kHz
Chapter 3: System On Chip Resources
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
PNX17xx Series
3-31