pnx1700 NXP Semiconductors, pnx1700 Datasheet - Page 594

• Manufacturer Part Number: pnx1700
• Description: Connected Media Processor
• Manufacturer: NXP Semiconductors

Philips Semiconductors
Volume 1 of 1
Table 6: Output Pixel Formats
PNX17XX_SER_1
Preliminary data sheet
Format
planar YUV or RGB
(4:4:4, 4:2:2 or
4:2:0)
semi planar YUV
(4:2:2 or 4:2:0)
packed 4/4/4 RGBa
packed 4/5/3 RGBa
packed 5/6/5 RGB
packed YUY2 4:2:2
packed UYVY 4:2:2
packed 888 RGB(a) (alpha)
packed 4:4:4
VYU(a)
2.4.7 Alpha Processing
2.4.8 Video Data Output
3
1
plane #1
plane #2
plane #3
plane #1
plane #2
(alpha)
3
0
2
9
Alpha processing is only available when the horizontal and vertical filter blocks are
either bypassed or operated in the four-component mode. If the horizontal filter is
used for color space conversion, the alpha information is kept time-aligned with the
other three components.
After processing the video stream, the MBS can split the video data into one or more
(up to three) different streams. For each stream, there is a memory base address.
There are two line-pitch registers further defining the DMA streams. The number of
streams (planes) is defined by the output-format register. Depending on its value, the
video components get packed into 64-bit words. These words then get buffered and
transferred to the external memory in more effective clusters. A list of the supported
output video formats is shown in
done from right to left, while bytes within one pixel unit are ordered according to the
Endian settings (according to the global Endian setting, the Endian bit in the output
format register can invert the setting).
Remark:
endian mode. The selected endian mode will affect the position of the components
within multi-byte pixel units!
•
2
8
If the alpha value, after horizontal and vertical processing, is below a fixed
threshold (0x80), the sample is replaced by the color key.
Fixed Alpha Insert
The alpha value defined in the Color Key register is inserted, as the fourth
component after horizontal and vertical processing, in the PSU unit (if
CKEY_K2A=1).
2
7
2
6
Table 6
2
5
2
4
shows location of the first ’pixel unit’ within a 64 bit word in the little
2
3
R8 or Y8
V8
Rev. 1 — 17 March 2006
2
2
2
1
2
0
1
9
Table
1
8
1
7
6. Packing of a pixel into 64-bit units is always
1
6
1
5
V8
alpha
alpha
R5
U8 or V8
Y8
G8 or U8
Y8
1
4
Chapter 19: Memory Based Scaler
1
3
1
2
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
1
1
R4
R4
PNX17xx Series
1
0
G6
9 8 7 6 5 4 3 2 1 0
Y8 or R8
U8 or G8
V8 or B8
Y8 or R8
U8
G4
G5
Y8
U8 or V8
B8 or V8
U8
B5
B4
B3
19-11