pnx1700 NXP Semiconductors, pnx1700 Datasheet - Page 65
pnx1700
Manufacturer Part Number
pnx1700
Description
Connected Media Processor
Manufacturer
NXP Semiconductors
Datasheet
1.PNX1700.pdf
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Philips Semiconductors
Volume 1 of 1
Table 35: 10/100 LAN MII Timing
PNX17XX_SER_1
Preliminary data sheet
Symbol
F
F
T
T
T
LAN_CLK
CLK
CLK-DV
SU-CLK
H-CLK
Parameter
LAN_CLK frequency
LAN_TX_CLK and LAN_RX_CLK frequency
Clock to LAN Outputs
Input setup time
Input hold time
7.6 10/100 LAN In MII Mode
[34-4]
[35-1]
[35-2]
[35-3]
[35-4]
Figure 14: VIP and FGPI I/O Timing
Figure 15: LAN 10/100 I/O Timing in MII Mode
3. See timing measurement conditions
Notes:
1. Timing applies whether the clock is external or internal.
2. Timing applies whether the data is output on a positive or a negative edge.
3. See timing measurement conditions
Rev. 1 — 17 March 2006
LAN_TXD[3:0]
LAN_RX_CLK
LAN_TX_CLK
LAN_TX_EN
LAN_TX_ER
VDI_D[33:0]
LAN_CRS/COL
LAN_MDIO
LAN_RXD[3:0]
VDI_V[1:0]
LAN_MDC
LAN_RX_CLK
LAN_TX_CLK
LAN_RX_DV
LAN_RX_ER
VDI_CLK
LAN_MDIO
Figure
Figure
Min
6
5
3
T
SU-CLK
T
SU-CLK
14.
15.
Chapter 1: Integrated Circuit Data
valid
Max
60
25
17
valid
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
T
T
PNX17xx Series
H-CLK
CLK-DV
valid
T
H-CLK
Units
MHz
MHz
ns
ns
ns
Notes
1, 2, 3
1, 2, 3
1, 2, 3
1-38
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